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[SOL] Allow branch folding to run in SBF #154

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Merged
merged 2 commits into from
Jun 18, 2025

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LucasSte
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@LucasSte LucasSte commented Jun 13, 2025

Problem

The SBF codegen has been generating awkward code for branches, particularly doing:

jeq r2, 0, LBB0_7
ja LBB0_3

While it could be doing:

jne r2, 0, LBB0_3

This happens because LLVM branch folding pass did not have enough information to simplify branches.

Solution

  1. Implement analyzeBranch, insertBranch, reverseBranchCondition,removeBranch and getBranchDestBlock correctly. I copied some functions from the aarch64 target, with specific adaptations for the SBF target.
  2. (Extra): I also implemented getInstSizeInBytes, which LLVM uses in the branch relaxing pass.

PS: I got mixed results, because branch folding runs multiple times in codegen. Now that LLVM has information about branches, programs changed completely. Branches are now different, some instructions are sunken, while others are hoisted. Register allocation also changed in some cases.

@LucasSte LucasSte changed the title Revert cond [SOL] Allow branch folding to run in SBF Jun 13, 2025
TBB = I->getOperand(0).getMBB();
continue;
}
// If the block has no terminators, it just falls into the block after it.
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This new implementation is from here:

bool AArch64InstrInfo::analyzeBranch(MachineBasicBlock &MBB,

I->eraseFromParent();
I = MBB.end();
++Count;
MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
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This one is from here:

unsigned AArch64InstrInfo::removeBranch(MachineBasicBlock &MBB,

@LucasSte LucasSte requested a review from Lichtso June 16, 2025 22:57
@LucasSte LucasSte marked this pull request as ready for review June 16, 2025 22:57
@LucasSte LucasSte merged commit 1fa01f5 into anza-xyz:solana-rustc/19.1-2024-12-03 Jun 18, 2025
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@LucasSte LucasSte deleted the revert-cond branch June 18, 2025 19:00
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2 participants