Improved support for Neoverse, added Zen 5

What's Changed

Microarchitecture support

• Adding optional CPUID field in microarchitecture schema and in json file for Arm architectures by @paolotricerri in #110 and @alalazo in #114
• Add Neoverse N2 by @paolotricerri in #112 and @alalazo in #116, #117
• Remove sm3, *sm4 from neoverse_v* by @alalazo in #115
• Remove ssbs from neoverse* CPUs by @stephenmsachs in #120
• Add AMD Zen5 Support by @amd-toolchain-support in #124
• Remove PDCM from the sapphirerapids list by @linsword13 in #119

Compilers

• Update nvhpc support on zen4 by @zzzoom in #109
• Update supported compiler versions for neoverse_v2 by @paolotricerri in #108

New Contributors

• @paolotricerri made their first contribution in #108
• @linsword13 made their first contribution in #119

Full Changelog: v0.2.4...v0.2.5

Fixes for Neoverse V1 and Neoverse V2 detection

What's Changed

• Add brand string output for cpuid tests by @alalazo in #90
• Remove paca, pacg, and bti from Neoverse V2 by @giordano in #92
• Remove paca, pacg, and bti from Neoverse V1 by @alalazo in #93

Full Changelog: v0.2.3...v0.2.4

Added JSON file with cpuid information

What's Changed

• Add a JSON file with information on cpuid by @alalazo in #86
• Add a new test, updated README by @alalazo in #87

Full Changelog: v0.2.2...v0.2.3

Support for Sapphire Rapids, Neoverse V2 and Power10

This release introduces support for:

• Sapphire Rapids (#76)
• Neoverse V2 (#79)
• Power 10 (#80)

Bug fixes

• Fix version range specification for GCC on neoverse_v1 @alalazo in #71
• Fix x86-64-v4 for icc by @stephenmsachs in #73
• Use -mcpu instead of -march for arm compiler on N1 and V1 by @annop-w in #81

Other updates

• Add GCC 12.3 znver4 support by @zzzoom in #72
• Add x86-64-v2 & x86-64-v3 & v4 for Intel compilers by @stephenmsachs in #70
• Remove erms & avic flags from zen4 by @stephenmsachs in #77

New Contributors

• @annop-w made their first contribution in #81
• @isuruf made their first contribution in #80
• @AdhocMan made their first contribution in #79

Full Changelog: v0.2.1...v0.2.2

Support for Zen 4 and nvhpc compiler

This release introduces support for:

• The Zen 4 microarchitecture (#58,#62,#68,#69)

and adds compiler flags for the nvhpc compiler (#67).

Bug Fixes

• Remove pmull feature from A64FX by @giordano in #59
• Apple M2: fix microarchitecture optimization flags by @alalazo in #65
• neoverse-v1: fix flags for GCC by @bernhardkaindl in #64

Other updates

• Intel compilers: Xeon Phi support deprecated by @zzzoom in #61

New Contributors

• @zzzoom made their first contribution in #61
• @bernhardkaindl made their first contribution in #64
• @cparrott73 made their first contribution in #67

Full Changelog: v0.2.0...v0.2.1

Support for Neoverse V1 and Apple M2

This release introduces support for:

• Neoverse v1 and generic Armv8.X architectures (#53, #57)
• Apple M2 (#55)

Breaking changes

• Compared to v0.1, the naming scheme for graviton chips changed to use generic microarchitecture names. This means that graviton is now named cortex_a72, graviton2 is now named neoverse_n1 and instead of graviton3 we introduced neoverse_v1 (#57)

Bug fixes

• Fixed wrong compiler flags for the Intel classic compiler when targeting x86_64 (#56)
• Removed the umip feature from icelake and cannonlake (#54)

Improved support for Apple M1 and a64fx, add flags for oneAPI compilers

This release improves support for:

• Apple M1
• a64fx

and adds compiler flags for oneAPI compilers.

Full Changelog: v0.1.3...v0.1.4

Support for Apple M1, Zen 3, RiscV and x86-64 architecture levels

This release adds support for:

• Apple M1
• Zen 3
• RiscV and SiFive u74mc
• x86-64 generic architecture levels

and improves compilers support in particular for AMD and ARM compilers.

Full Changelog: v0.1.2...v0.1.3

Support for Graviton and Graviton2

This release adds support for Graviton and Graviton 2 microarchitectures. Other notable additions:

• Added support for Apple Clang optimization flags on x86_64 microarchitectures
• Added samples of /proc/cpuinfo and sysctl output to the repository, to ease testing for different language bindings
• A few misnamed features for icelake have been fixed

Rework of the JSON schema

The main modification in this release is a reworking of the schema to make the JSON file easier to parse and work with, in particular for statically typed languages (see #1). Other modifications:

• Microarchitectures in the ppc64 or ppc64le family can be queried for vsx and fma instructions
• Version suffixes for compilers have been abandoned as a way to distinguish among them. Apple's clang is now called apple-clang in the JSON file