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fix(spi): allow using both tx+rx DMA even if capability is not Duplex #883

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Merged
merged 10 commits into from
Jun 12, 2025

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ritikmishra
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Summary

Previously, the SPI API would only allow using both TX and RX DMA channels if both the DI and DO pads were connected. However, even if there is no DO pad present, it is still useful to use a TX DMA in order to write bytes into the data register + drive SCK (in order to receive data from a SPI slave).

We are using at ATSAME54N19A to read voltages from an ADS7043 ADC. The ADS7043 ADC will automatically send the measurement over MISO once clock pulses are detected on SCK, meaning that using MOSI is not necessary.

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@jbeaurivage jbeaurivage left a comment

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Hey @ritikmishra, thanks for bringing this up. You're right that this is a gap, which seems to be only present in the async+DMA implementation. In fact, we got it right in the blocking+DMA impl:

impl<C, D> Spi<C, D>
where
    C: ValidConfig,
    D: Receive,
    C::OpMode: MasterMode,
{
    /// Attach RX and TX DMA channels to this [`Spi`]. Its
    /// [`SpiBus`](crate::ehal::spi::SpiBus) implementation will use DMA to
    /// carry out its transactions. In Master mode, since even read SPI
    /// transaction necessarily involve a write, [`Rx`]-only must take two
    /// DMA channels, just the same as if it were [`Duplex`].
    #[cfg(feature = "dma")]
    pub fn with_dma_channels<R, T>(self, rx: R, tx: T) -> Spi<C, D, R, T>
    where
        R: crate::dmac::AnyChannel<Status = crate::dmac::Ready>,
        T: crate::dmac::AnyChannel<Status = crate::dmac::Ready>,
    {
        Spi {
            capability: self.capability,
            config: self.config,
            _rx_channel: rx,
            _tx_channel: tx,
        }
    }
}

To sum up:

  • In master mode:
    • RX: requires 2 channels
    • TX: requires 1 channel
  • In slave mode:
    • RX: requires 1 channel
    • TX: requires 1 channel

@jbeaurivage
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jbeaurivage commented Jun 11, 2025

I've made the required changes in this PR. Please let me know if you have questions or comments, otherwise please just merge it and I'll merge #883!

@ritikmishra
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@ritikmishra ritikmishra requested a review from jbeaurivage June 12, 2025 05:05
@ritikmishra ritikmishra requested a review from jbeaurivage June 12, 2025 19:16
@jbeaurivage jbeaurivage merged commit 0ffddb6 into atsamd-rs:master Jun 12, 2025
91 of 109 checks passed
jbeaurivage added a commit that referenced this pull request Jun 12, 2025
@ritikmishra ritikmishra deleted the dev/rm/spi-rx-dma branch June 12, 2025 19:29
jbeaurivage added a commit that referenced this pull request Jun 17, 2025
jbeaurivage added a commit that referenced this pull request Jun 18, 2025
jbeaurivage added a commit that referenced this pull request Jun 20, 2025
jbeaurivage added a commit that referenced this pull request Jun 20, 2025
* atsamd-hal release v0.22.0

* Add missing commits to HAL changelog

* Update wio_terminal changelog to include #874

* Update HAL changelog to include #881

* Update HAL changelog to include #883

* Updade pygamer and HAL changelogs following #814

* Update HAL changelog to include #880

* Update HAL changelog to include #878

* Update HAL changelog to include #875

* Update HAL changelog to include #845

* Bump atsamd-hal-macros (#875)

* Changelog formatting
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2 participants