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net: make caching calls work on RISC-V, even though they are no-ops
Rather than having #ifdefs for ARM, we instead have the implementations handle the architecture specific operations. In RISC-V's case, this is just a no-op. I removed `ROUND_UP(buffer.len, 1 << CONFIG_L1_CACHE_LINE_SIZE_BITS)` because we do the rounding up in `cache_clean_and_invalidate` anyways. We can't have this line on RISC-V because `CONFIG_L1_CACHE_LINE_SIZE_BITS` does not exist on non-ARM architectures. Signed-off-by: Ivan Velickovic <i.velickovic@unsw.edu.au>
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