Add shutdown code, add asynchronous signals

common/include/attributes.h

@@ -6,6 +6,17 @@
 // this file provides convenience macros for the attributes provided by gcc:
 // https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html
 
+#ifdef BADGEROS_KERNEL
+#include <config.h>
+#ifdef CONFIG_TARGET_generic
+// Function that must be in RAM for XIP targets.
+#define RAMFUNC
+#else
+// Function that must be in RAM for XIP targets.
+#define RAMFUNC __attribute__((section(".ramtext")))
+#endif
+#endif
+
 // Disable address sanitization for a function.
 #define NOASAN __attribute__((no_sanitize("address")))
 

common/include/sys/wait.h

@@ -15,9 +15,9 @@
 // Create status for child exited normally.
 #define W_EXITED(ret)    ((ret) << 8)
 // Create status for child exited by signal.
-#define W_SIGNALLED(sig) ((sig) | 0x40)
+#define W_SIGNALLED(sig) (((sig) << 8) | 0x40)
 // Create status for child that was suspended by a signal.
-#define W_STOPCODE(sig)  ((sig) << 8 | 0x20)
+#define W_STOPCODE(sig)  (((sig) << 8) | 0x20)
 // Child was continued.
 #define W_CONTINUED      0x10
 // Child dumped core.

files/sbin/init/main.c

@@ -1,6 +1,7 @@
 
 // SPDX-License-Identifier: MIT
 
+#include "signal.h"
 #include "syscall.h"
 
 
@@ -18,9 +19,11 @@ void print(char const *cstr) {
 char const hextab[] = "0123456789ABCDEF";
 
 int main() {
+    syscall_proc_sighandler(SIGHUP, SIG_IGN);
+
     badge_err_t ec = {0};
     print("Hi, Ther.\n");
 
-    syscall_sys_shutdown(false);
+    syscall_sys_shutdown(true);
     return 0;
 }

kernel/CMakeLists.txt

@@ -47,10 +47,6 @@ if("${CMAKE_BUILD_TYPE}" MATCHES "Release")
 message("Building in release mode")
 else()
 message("Building in debug mode")
-set(common_compiler_flags ${common_compiler_flags}
-    -fsanitize=undefined               # Adds sanitizer for undefined behaviour.
-    -fsanitize-undefined-trap-on-error
-)
 endif()
 
 # we must pass the same options to GCC and LD when using LTO, as the linker will actually do the codegen

kernel/include/process/process.h

@@ -27,6 +27,11 @@ typedef struct process_t process_t;
 // Globally unique process ID.
 typedef int              pid_t;
 
+// Send a signal to all running processes in the system except the init process.
+void proc_signal_all(int signal);
+// Whether any non-init processes are currently running.
+bool proc_has_noninit();
+
 // Create a new, empty process.
 pid_t    proc_create(badge_err_t *ec, pid_t parent, char const *binary, int argc, char const *const *argv);
 // Delete a process only if it hasn't been started yet.

kernel/include/stdlib.h

@@ -0,0 +1,4 @@
+
+// Dummy stdlib.h
+
+#pragma once

kernel/port/esp32c6/CMakeLists.txt

@@ -32,3 +32,4 @@ set(port_flags
 )
 
 include(port/esp_common/CMakeLists.txt)
+set_target_properties(${target} PROPERTIES LINK_DEPENDS ${CMAKE_CURRENT_LIST_DIR}/linker.ld)

kernel/port/esp32c6/include/port/port.h

@@ -3,14 +3,16 @@
 
 #pragma once
 
+#include <stdbool.h>
 #include <stddef.h>
 #include <stdint.h>
 
 // Early hardware initialization.
 void port_early_init();
 // Full hardware initialization.
 void port_init();
-
+// Power off.
+void port_poweroff(bool restart);
 // Send a single character to the log output.
 void port_putc(char msg);
 

kernel/port/esp32c6/include/sdkconfig.h

@@ -0,0 +1,4 @@
+
+#pragma once
+
+#define CONFIG_IDF_TARGET_ESP32C6 1

kernel/port/esp32c6/linker.ld

@@ -106,7 +106,12 @@ PROVIDE(CLINT_U = 0x20001C00);
 
 	. = __start_sram;
 	__start_data = .;
-	.data : AT(LOADADDR(.espseg.2) + SIZEOF(.espseg.2)) {
+	.ramtext : AT(LOADADDR(.espseg.2) + SIZEOF(.espseg.2)) {
+		. = ALIGN(__section_alignment);
+		*(.ramtext) *(.ramtext.*)
+		. = ALIGN(__section_alignment);
+	} >sram :dataseg
+	.data : AT(LOADADDR(.ramtext) + SIZEOF(.ramtext)) {
 		. = ALIGN(__section_alignment);
 		*(.data) *(.data.*)
 		. = ALIGN(__section_alignment);

kernel/port/esp32c6/src/interrupt.c

@@ -67,6 +67,9 @@ void irq_init() {
     for (int i = 0; i < 32; i++) {
         PLIC_MX.int_pri[i] = 7;
     }
+
+    // Enable appropriate interrupts.
+    asm volatile("csrw mie, %0" ::"r"((1 << TIMER_IRQ_CH) | (1 << EXT_IRQ_CH)));
 }
 
 // Callback from ASM to platform-specific interrupt handler.

kernel/port/esp32c6/src/port.c

@@ -3,17 +3,32 @@
 
 #include "port/port.h"
 
+#include "attributes.h"
 #include "cpulocal.h"
+#include "hal/gpio.h"
 #include "interrupt.h"
 #include "isr_ctx.h"
 #include "port/clkconfig.h"
 #include "port/hardware_allocation.h"
 #include "port/pmu_init.h"
+#include "rawprint.h"
 #include "time.h"
 
 #include <stdbool.h>
 
+// NOLINTBEGIN
+#define STDLIB_H
+#define _STDLIB_H
+#define __STDLIB_H
+// NOLINTEND
+
+#include <hal/clk_tree_ll.h>
+#include <hal/pmu_ll.h>
+#include <hal/rwdt_ll.h>
+#include <rom/cache.h>
+#include <soc/lp_wdt_struct.h>
 #include <soc/pcr_struct.h>
+#include <soc/timer_group_struct.h>
 #include <soc/uart_struct.h>
 #include <soc/usb_serial_jtag_struct.h>
 
@@ -40,6 +55,83 @@ void port_init() {
     irq_ch_enable(ETS_I2C_EXT0_INTR_SOURCE);
 }
 
+// Power off all peripherals.
+static void peri_poweroff() {
+    // Wait for UART0 to finish sending.
+    while (UART0.status.txfifo_cnt) continue;
+
+    // Set all GPIOs to input.
+    for (int i = 0; i < io_count(); i++) {
+        io_mode(NULL, i, IO_MODE_INPUT);
+        io_pull(NULL, i, IO_PULL_NONE);
+    }
+
+    // Power off UART.
+    PCR.uart0_pd_ctrl.uart0_mem_force_pd = false;
+    PCR.uart0_pd_ctrl.uart0_mem_force_pu = false;
+    PCR.uart0_conf.uart0_rst_en          = true;
+    PCR.uart0_conf.uart0_clk_en          = false;
+    PCR.uart0_sclk_conf.uart0_sclk_en    = false;
+
+    PCR.uart1_pd_ctrl.uart1_mem_force_pd = false;
+    PCR.uart1_pd_ctrl.uart1_mem_force_pu = false;
+    PCR.uart1_conf.uart1_rst_en          = true;
+    PCR.uart1_conf.uart1_clk_en          = false;
+    PCR.uart1_sclk_conf.uart1_sclk_en    = false;
+
+    // Power off I²C.
+    PCR.i2c_conf.i2c_clk_en       = false;
+    PCR.i2c_conf.i2c_rst_en       = true;
+    PCR.i2c_sclk_conf.i2c_sclk_en = false;
+
+    // Power off SPI.
+    PCR.spi2_conf.spi2_clk_en       = false;
+    PCR.spi2_conf.spi2_rst_en       = false;
+    PCR.spi2_clkm_conf.spi2_clkm_en = false;
+
+    // Power off timers.
+    PCR.timergroup0_timer_clk_conf.tg0_timer_clk_en = false;
+    PCR.timergroup0_wdt_clk_conf.tg0_wdt_clk_en     = false;
+    PCR.timergroup0_conf.tg0_clk_en                 = false;
+    PCR.timergroup0_conf.tg0_rst_en                 = true;
+    PCR.timergroup1_timer_clk_conf.tg1_timer_clk_en = false;
+    PCR.timergroup1_wdt_clk_conf.tg1_wdt_clk_en     = false;
+    PCR.timergroup1_conf.tg1_clk_en                 = false;
+    PCR.timergroup1_conf.tg1_rst_en                 = true;
+}
+
+RAMFUNC static void trigger_restart() {
+    Cache_Disable_ICache();
+
+    // Reset the CPU.
+    void software_reset_cpu();
+    software_reset_cpu(0);
+}
+
+RAMFUNC static void enter_deep_sleep() {
+    pmu_ll_hp_set_wakeup_enable(&PMU, 0);
+    pmu_ll_hp_set_reject_enable(&PMU, 0);
+
+    pmu_ll_hp_clear_wakeup_intr_status(&PMU);
+    pmu_ll_hp_clear_reject_intr_status(&PMU);
+    pmu_ll_hp_clear_reject_cause(&PMU);
+
+    pmu_ll_hp_set_sleep_enable(&PMU);
+}
+
+// Power off.
+RAMFUNC void port_poweroff(bool restart) {
+    rawprint("\n\n");
+    irq_disable();
+    peri_poweroff();
+    if (restart) {
+        trigger_restart();
+    } else {
+        enter_deep_sleep();
+    }
+    while (1) continue;
+}
+
 // Send a single character to the log output.
 void port_putc(char msg) {
     static bool    discon   = false;

kernel/port/esp32p4/CMakeLists.txt

@@ -29,3 +29,4 @@ set(port_flags
 )
 
 include(port/esp_common/CMakeLists.txt)
+set_target_properties(${target} PROPERTIES LINK_DEPENDS ${CMAKE_CURRENT_LIST_DIR}/linker.ld)

kernel/port/esp32p4/include/port/port.h

@@ -3,16 +3,17 @@
 
 #pragma once
 
+#include <stdbool.h>
 #include <stddef.h>
 #include <stdint.h>
 
 // Early hardware initialization.
 void port_early_init();
 // Full hardware initialization.
 void port_init();
-
+// Power off.
+void port_poweroff(bool restart);
 // Send a single character to the log output.
 void port_putc(char msg);
-
 // Fence data and instruction memory for executable mapping.
 void port_fencei();

kernel/port/esp32p4/include/sdkconfig.h

@@ -0,0 +1,4 @@
+
+#pragma once
+
+#define CONFIG_IDF_TARGET_ESP32P4 1

kernel/port/esp32p4/linker.ld

@@ -109,7 +109,12 @@ PROVIDE(CLIC_CTL = 0x20801000);
 
 	. = __start_sram;
 	__start_data = .;
-	.data : AT(LOADADDR(.espseg.2) + SIZEOF(.espseg.2)) {
+	.ramtext : AT(LOADADDR(.espseg.2) + SIZEOF(.espseg.2)) {
+		. = ALIGN(__section_alignment);
+		*(.ramtext) *(.ramtext.*)
+		. = ALIGN(__section_alignment);
+	} >sram :dataseg
+	.data : AT(LOADADDR(.ramtext) + SIZEOF(.ramtext)) {
 		. = ALIGN(__section_alignment);
 		*(.data) *(.data.*)
 		. = ALIGN(__section_alignment);

kernel/port/esp32p4/src/port.c

@@ -5,15 +5,21 @@
 
 #include "cpulocal.h"
 #include "hal/cpu_utility_ll.h"
+#include "hal/gpio.h"
 #include "interrupt.h"
 #include "isr_ctx.h"
 #include "log.h"
 #include "port/pmu_init.h"
-#include "rom/cache.h"
-#include "rom/ets_sys.h"
-#include "soc/hp_sys_clkrst_struct.h"
-#include "soc/interrupts.h"
-#include "soc/uart_struct.h"
+#include "rawprint.h"
+#include "smp.h"
+
+#include <hal/cpu_utility_ll.h>
+#include <hal/pmu_ll.h>
+#include <rom/cache.h>
+#include <rom/ets_sys.h>
+#include <soc/hp_sys_clkrst_struct.h>
+#include <soc/interrupts.h>
+#include <soc/uart_struct.h>
 
 // CPU0 local data.
 cpulocal_t port_cpu0_local;
@@ -58,6 +64,53 @@ void port_init() {
     irq_ch_enable(ETS_I2C0_INTR_SOURCE);
 }
 
+// Power off all peripherals.
+static void peri_poweroff() {
+    // Wait for UART0 to finish sending.
+    while (UART0.status.txfifo_cnt) continue;
+
+    // Set all GPIOs to input.
+    for (int i = 0; i < io_count(); i++) {
+        io_mode(NULL, i, IO_MODE_INPUT);
+        io_pull(NULL, i, IO_PULL_NONE);
+    }
+
+    // TODO.
+}
+
+RAMFUNC static void trigger_restart() {
+    ets_set_appcpu_boot_addr(0);
+
+    // Reset other core followed by this core.
+    int cpuid = smp_cur_cpu();
+    cpu_utility_ll_reset_cpu(!cpuid);
+    cpu_utility_ll_reset_cpu(cpuid);
+}
+
+RAMFUNC static void enter_deep_sleep() {
+    pmu_ll_hp_set_wakeup_enable(&PMU, 0);
+    pmu_ll_hp_set_reject_enable(&PMU, 0);
+
+    pmu_ll_hp_clear_wakeup_intr_status(&PMU);
+    pmu_ll_hp_clear_reject_intr_status(&PMU);
+    pmu_ll_hp_clear_reject_cause(&PMU);
+
+    pmu_ll_hp_set_sleep_enable(&PMU);
+}
+
+// Power off.
+RAMFUNC void port_poweroff(bool restart) {
+    rawprint("\n\n");
+    irq_disable();
+    peri_poweroff();
+    if (restart) {
+        trigger_restart();
+    } else {
+        enter_deep_sleep();
+    }
+    while (1) continue;
+}
+
 // Send a single character to the log output.
 void port_putc(char msg) {
     UART0.fifo.val = msg;

kernel/port/esp_common/src/gpio.c

@@ -3,16 +3,16 @@
 
 #include "hal/gpio.h"
 
+// NOLINTBEGIN
 #pragma GCC diagnostic push
 #pragma GCC diagnostic ignored "-Wunused-parameter"
-// NOLINTBEGIN
 #define STDLIB_H
 #define _STDLIB_H
 #define __STDLIB_H
-// NOLINTEND
 #include "hal/gpio_ll.h"
 #include "soc/gpio_sig_map.h"
 #pragma GCC diagnostic pop
+// NOLINTEND
 
 #include "soc/io_mux_struct.h"