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Apply bytecodes
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ahmtcn123 committed Apr 27, 2022
1 parent 85e71fa commit 580a7f5
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4 changes: 4 additions & 0 deletions bytecode/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,10 @@ license = "GPL-2.0"
ellie_core = { path = "../core", version = "0.2.0" }
ellie_parser = { path = "../parser", version = "0.3.0" }
enum-as-inner = "0.3.3"
phf = {version = "0.10.1", features = ["macros"]}

[build-dependencies]
serde_json = { version = "1.0", default-features = false, features = ["alloc"] }

[features]
default = ["std"]
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109 changes: 46 additions & 63 deletions bytecode/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -14,8 +14,9 @@ Ellie bytecode is phase 3 of compiling process.

| Mode | Detail |
| --------- | ----------------------------------------------- |
| immediate | Instructions with no parameters |
| absolute | Instructions that takes memory locations |
| implicit | Instructions with no parameters |
| immediate | Instructions that takes values |
| absolute | Instructions that takes stack locations |
| indirecta | Instructions that takes A register as parameter |
| indirectb | Instructions that takes B register as parameter |
| indirectc | Instructions that takes C register as parameter |
Expand Down Expand Up @@ -43,6 +44,11 @@ Ellie bytecode is phase 3 of compiling process.
* LDC #VALUE
* LDX #VALUE
* LDY #VALUE
* MCA
* MCB
* MCC
* MCX
* MCY

### Store
* STA $ADDRESS
Expand Down Expand Up @@ -107,66 +113,43 @@ Debug Headers:

--

```ei
v a = 1
v b = 2
fn testf(c: int, d: int) : int {
ret c + d;
}
v c = tesf(c, d);
```

Bytecode:
```
#00000000:
LDA 1
STA #01
LDB 2
STB #02
CALL #01
STC #03
#00000001:
LDB #01
LDC #02
ADD
RET $C
```

--

| Instructions | Immediate | absolute | indirecta | indirectb | indirectc | indirectx | indirecty |
| ------------ | --------- | -------- | --------- | --------- | --------- | --------- | --------- |
| LDA | -- | 02 | 03 | 04 | 05 | 05 | 06 |
| LDB | 07 (I) | 08 | 09 | 0A | 0B | 0C | 0D |
| LDC | 0E (I) | 0F | 10 | 11 | 12 | 13 | 14 |
| LDX | 15 (I) | 16 | 17 | 18 | 19 | 1A | 1B |
| LDY | 1C (I) | 1D | 1E | 1F | 20 | 21 | 22 |
| STA | 23 | 24 | 25 | 26 | 27 | 28 | 29 |
| STB | 2A | 2B | 2C | 2D | 2E | 2F | 30 |
| STC | 31 | 32 | 33 | 34 | 35 | 36 | 37 |
| STX | 38 | 39 | 3A | 3B | 3C | 3D | 3E |
| STY | 3F | 40 | 41 | 42 | 43 | 44 | 45 |
| EQ | 46 | 47 | 48 | 49 | 4A | 4B | 4C |
| NE | 4D | 4E | 4F | 50 | 51 | 52 | 53 |
| GT | 54 | 55 | 56 | 57 | 58 | 59 | 5A |
| LT | 5B | 5C | 5D | 5E | 5F | 60 | 61 |
| GQ | 62 | 63 | 64 | 65 | 66 | 67 | 68 |
| LQ | 69 | 6A | 6B | 6C | 6D | 6E | 6F |
| AND | 70 | 71 | 72 | 73 | 74 | 75 | 76 |
| OR | 77 | 78 | 79 | 7A | 7B | 7C | 7D |
| ADD | 7E | 7F | 80 | 81 | 82 | 83 | 84 |
| SUB | 85 | 86 | 87 | 88 | 89 | 8A | 8B |
| MUL | 8C | 8D | 8E | 8F | 90 | 91 | 92 |
| EXP | 93 | 94 | 95 | 96 | 97 | 98 | 99 |
| DIV | 9A | 9B | 9C | 9D | 9E | 9F | A0 |
| MOD | A1 | A2 | A3 | A4 | A5 | A6 | A7 |
| INC | A8 | A9 | AA | AB | AC | AD | AE |
| DEC | AF | B0 | B1 | B2 | B3 | B4 | B5 |
| CALL | B6 | B7 | B8 | B9 | BA | BB | BC |
| RET | BD | BE | BF | C0 | C1 | C2 | C3 |
| JMP | C4 (I) | C5 | C6 (I) | C7 (I) | C8 (I) | C9 (I) | CA (I) |
| DRP | -- | 01 | -- | -- | -- | -- | -- |
| Instructions | Implicit | Immediate | absolute | indirecta | indirectb | indirectc | indirectx | indirecty |
| ------------ | --------- | --------- | -------- | --------- | --------- | --------- | --------- | --------- |
| LDA | -- | -- | -- | -- | -- | -- | -- | -- |
| LDB | -- | -- | -- | -- | -- | -- | -- | -- |
| LDC | -- | -- | -- | -- | -- | -- | -- | -- |
| LDX | -- | -- | -- | -- | -- | -- | -- | -- |
| LDY | -- | -- | -- | -- | -- | -- | -- | -- |
| !MCA | -- | -- | -- | -- | -- | -- | -- | -- |
| !MCB | -- | -- | -- | -- | -- | -- | -- | -- |
| !MCC | -- | -- | -- | -- | -- | -- | -- | -- |
| !MCX | -- | -- | -- | -- | -- | -- | -- | -- |
| !MCY | -- | -- | -- | -- | -- | -- | -- | -- |
| STA | -- | -- | -- | -- | -- | -- | -- | -- |
| STB | -- | -- | -- | -- | -- | -- | -- | -- |
| STC | -- | -- | -- | -- | -- | -- | -- | -- |
| STX | -- | -- | -- | -- | -- | -- | -- | -- |
| STY | -- | -- | -- | -- | -- | -- | -- | -- |
| EQ | -- | -- | -- | -- | -- | -- | -- | -- |
| NE | -- | -- | -- | -- | -- | -- | -- | -- |
| GT | -- | -- | -- | -- | -- | -- | -- | -- |
| LT | -- | -- | -- | -- | -- | -- | -- | -- |
| GQ | -- | -- | -- | -- | -- | -- | -- | -- |
| LQ | -- | -- | -- | -- | -- | -- | -- | -- |
| AND | -- | -- | -- | -- | -- | -- | -- | -- |
| OR | -- | -- | -- | -- | -- | -- | -- | -- |
| ADD | -- | -- | -- | -- | -- | -- | -- | -- |
| SUB | -- | -- | -- | -- | -- | -- | -- | -- |
| MUL | -- | -- | -- | -- | -- | -- | -- | -- |
| EXP | -- | -- | -- | -- | -- | -- | -- | -- |
| DIV | -- | -- | -- | -- | -- | -- | -- | -- |
| MOD | -- | -- | -- | -- | -- | -- | -- | -- |
| INC | -- | -- | -- | -- | -- | -- | -- | -- |
| DEC | -- | -- | -- | -- | -- | -- | -- | -- |
| CALL | -- | -- | -- | -- | -- | -- | -- | -- |
| RET | -- | -- | -- | -- | -- | -- | -- | -- |
| JMP | -- | -- | -- | -- | -- | -- | -- | -- |

(I): Illegal instruction
(P): Pointer
* Illegal Instructions could be used in the future to implement other instructions
65 changes: 65 additions & 0 deletions bytecode/build.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,65 @@
use serde_json::Value;
use std::io::Write;
extern crate alloc;

#[path = "src/instructions.rs"]
mod instructions;

fn main() {
//Read bytecode.json
let bytecode_json = std::fs::read_to_string(
env!("CARGO_MANIFEST_DIR").to_owned() + &"/bytecode.json".to_owned(),
)
.unwrap();
//Parse json
let bytecode_json: Value = serde_json::from_str(&bytecode_json).unwrap();

let instructions: Vec<crate::instructions::InstructionStruct> = bytecode_json["instructions"]
.as_object()
.unwrap()
.iter()
.map(|x| crate::instructions::InstructionStruct {
op_code: x.0.to_string(),
rtype: x.1["type"].as_str().unwrap().to_owned(),
mode: match x.1["mode"].as_str().unwrap() {
"implicit" => crate::instructions::AddressingModesStruct::Implicit,
"immediate" => crate::instructions::AddressingModesStruct::Immediate,
"absolute" => crate::instructions::AddressingModesStruct::Absolute,
"indirecta" => crate::instructions::AddressingModesStruct::IndirectA,
"indirectb" => crate::instructions::AddressingModesStruct::IndirectB,
"indirectc" => crate::instructions::AddressingModesStruct::IndirectC,
"indirectx" => crate::instructions::AddressingModesStruct::IndirectX,
"indirecty" => crate::instructions::AddressingModesStruct::IndirectY,
_ => panic!("Unknown addressing mode"),
},
})
.collect();
let mut instruction_markdown_table = String::new();
instruction_markdown_table.push_str("OpCode | Instruction | Mode Y\n");
instruction_markdown_table.push_str("--- | --- | --- |\n");
for instruction in instructions {
instruction_markdown_table.push_str(&format!(
"{} | {} | {}\n",
instruction.op_code,
instruction.rtype,
match instruction.mode {
crate::instructions::AddressingModesStruct::Implicit => "Implicit",
crate::instructions::AddressingModesStruct::Immediate => "Immediate",
crate::instructions::AddressingModesStruct::Absolute => "Absolute",
crate::instructions::AddressingModesStruct::IndirectA => "IndirectA",
crate::instructions::AddressingModesStruct::IndirectB => "IndirectB",
crate::instructions::AddressingModesStruct::IndirectC => "IndirectC",
crate::instructions::AddressingModesStruct::IndirectX => "IndirectX",
crate::instructions::AddressingModesStruct::IndirectY => "IndirectY",
}
));
}

//Create file
let mut file = std::fs::File::create(
env!("CARGO_MANIFEST_DIR").to_owned() + &"/instructions.md".to_owned(),
)
.unwrap();
file.write_all(instruction_markdown_table.as_bytes())
.unwrap();
}
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