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Feat:Add SVE (Scalable Vector Extension) support for SimdUtil-inl.h #59
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Added SVE support for various SIMD operations and updated function signatures to use int64_t instead of int32_t for better compatibility with larger data sizes.
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can you add some tests about the simd code? besides, it is better to report the performance gain by comparing to the scalar code |
conanfile.py
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| # Support CRC & NEON on ARMv8 | ||
| flags = f"{self.BOLT_GLOABL_FLAGS} -march=armv8.3-a" | ||
| # Support CRC & NEON & SVE on ARMv8 | ||
| flags = f"{self.BOLT_GLOABL_FLAGS} -march=armv8.3-a+sve -msve-vector-bits=256 -DSVE_BITS=256" |
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It won't work on the old ARM platform which only support Neon?
Is any compiler flag to detect this? The specified preprocessor macro SVE_BITS does not work on all the hardware platforms
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It won't work on the old ARM platform which only support Neon? Is any compiler flag to detect this? The specified preprocessor macro
SVE_BITSdoes not work on all the hardware platforms
Added 'lscpu' to determine if the current CPU supports the 'sve' instruction set
We will provide reports on scalar and vector differences soon |
What problem does this PR solve?
Issue Number: close #54
Type of Change
Description
Constructed the xsimd extension of SVE and implemented SVE optimization for some Simd functions.
Performance Impact
No Impact: This change does not affect the critical path (e.g., build system, doc, error handling).
Positive Impact: I have run benchmarks.
Click to view Benchmark Results
Negative Impact: Explained below (e.g., trade-off for correctness).
Release Note
Please describe the changes in this PR
Release Note:
Checklist (For Author)
Breaking Changes
No
Yes (Description: ...)
Click to view Breaking Changes