Kernel: Half-finished aarch64 implementation.

...And, this is me signing out for a while. It's been fun :)

.github/workflows/build-os.yml

@@ -49,18 +49,18 @@ jobs:
       
       - name: Build duckOS (Release)
         run: |
-          cd build/i386
-          cmake ../.. -DCMAKE_TOOLCHAIN_FILE=build/i386/CMakeToolchain.txt -DCMAKE_BUILD_TYPE=Release
+          cd build/i686
+          cmake ../.. -DCMAKE_TOOLCHAIN_FILE=build/i686/CMakeToolchain.txt -DCMAKE_BUILD_TYPE=Release
           make install
           
       - name: Make image
         run: |
-          cd build/i386
+          cd build/i686
           make image
           
       - name: Upload image
         uses: actions/upload-artifact@v3
         with:
           name: Disk Image
-          path: build/i386/duckOS.img
+          path: build/i686/duckOS.img
 

kernel/KernelMapper.cpp

@@ -136,9 +136,9 @@ void KernelMapper::print_stacktrace(size_t ebp) {
 		//Finally, get the symbol name and print
 		auto* sym = KernelMapper::get_symbol(stk[1]);
 		if(sym)
-			printf("0x%x %s\n", stk[1], sym->name);
+			printf("0x%lx %s\n", stk[1], sym->name);
 		else
-			printf("0x%x\n", stk[1]);
+			printf("0x%lx\n", stk[1]);
 
 		//Continue walking the stack
 		stk = (size_t*) stk[0];

kernel/api/registers.h

@@ -4,6 +4,8 @@
 #pragma once
 #include "types.h"
 
+#if defined(__i386__)
+
 __DECL_BEGIN
 
 struct ptrace_registers {
@@ -30,4 +32,5 @@ union PTraceRegisters {
 	};
 };
 
-#endif
+#endif
+#endif // TODO: aarch64

kernel/arch/aarch64/PageDirectory.cpp

@@ -3,33 +3,16 @@
 
 #include "kernel/kstd/vector.hpp"
 #include "kernel/tasking/TaskManager.h"
-#include "kernel/kstd/defines.h"
-#include "kernel/Atomic.h"
 #include "kernel/memory/MemoryManager.h"
-#include "kernel/kstd/KLog.h"
-#include "kernel/KernelMapper.h"
-#include "kernel/kstd/cstring.h"
 #include "PageDirectory.h"
 
-#include <kernel/memory/PageDirectory.h>
-#include "rpi/MMIO.h"
-
 using namespace Aarch64;
 
 __attribute__((aligned(4096))) MMU::TableDescriptor __kernel_pgd[512];
 
 
 void PageDirectory::init_paging() {
 	setup_kernel_map();
-	auto map_range = [&](VirtualAddress vstart, VirtualAddress pstart, size_t size, VMProt prot, bool dev) {
-		size_t start_vpage = vstart / PAGE_SIZE;
-		size_t start_ppage = pstart / PAGE_SIZE;
-		size_t num_pages = ((vstart + size) / PAGE_SIZE) - start_vpage;
-		for(size_t i = 0; i < num_pages; i++)
-			if(MM.kernel_page_directory.map_page(start_vpage + i, start_ppage + i, prot, dev).is_error())
-				PANIC("PAGING_INIT_FAIL", "Could not map the kernel when setting up paging.");
-	};
-	map_range(RPi::MMIO::phys_base, RPi::MMIO::phys_base, RPi::MMIO::phys_size, VMProt::RW, true);
 
 	asm volatile(
 			"msr ttbr1_el1, %0 \n"

kernel/arch/aarch64/Processor.cpp

@@ -2,6 +2,7 @@
 /* Copyright © 2016-2024 Byteduck */
 
 #include "Processor.h"
+#include <kernel/tasking/Thread.h>
 
 void Processor::init() {
 
@@ -44,3 +45,108 @@ void Processor::disable_interrupts() {
 void Processor::enable_interrupts() {
 
 }
+
+extern "C" void thread_first_entry() {
+	asm volatile (
+			"ldp x0, x1,   [sp, #0x00]  \n"
+			"ldp x2, x3,   [sp, #0x10]  \n"
+			"ldp x4, x5,   [sp, #0x20]  \n"
+			"ldp x6, x7,   [sp, #0x30]  \n"
+			"ldp x8, x9,   [sp, #0x40]  \n"
+			"ldp x10, x11, [sp, #0x50]  \n"
+			"ldp x12, x13, [sp, #0x60]  \n"
+			"ldp x14, x15, [sp, #0x70]  \n"
+			"ldp x16, x17, [sp, #0x80]  \n"
+			"ldp x18, x19, [sp, #0x90]  \n"
+			"ldp x20, x21, [sp, #0xa0]  \n"
+			"ldp x22, x23, [sp, #0xb0]  \n"
+			"ldp x24, x25, [sp, #0xc0]  \n"
+			"ldp x26, x27, [sp, #0xd0]  \n"
+			"ldp x28, x29, [sp, #0xe0]  \n"
+			"ldr x30,      [sp, #0xf0]  \n"
+			"add sp, sp,   #248         \n");
+	printf("Cool!\n");
+	while(1);
+}
+
+ThreadRegisters Processor::initial_thread_registers(bool kernel, size_t entry, size_t sp) {
+	ThreadRegisters ret {};
+	ret.elr_el1 = (size_t) thread_first_entry;
+	ret.gp.x30 = entry;
+	return ret;
+}
+
+void Processor::switch_threads(Thread* old_thread, Thread* new_thread) {
+	asm volatile (
+			"sub sp, sp,   #248         \n" // Store GP
+			"stp x0, x1,   [sp, #0x00]  \n"
+			"stp x2, x3,   [sp, #0x10]  \n"
+			"stp x4, x5,   [sp, #0x20]  \n"
+			"stp x6, x7,   [sp, #0x30]  \n"
+			"stp x8, x9,   [sp, #0x40]  \n"
+			"stp x10, x11, [sp, #0x50]  \n"
+			"stp x12, x13, [sp, #0x60]  \n"
+			"stp x14, x15, [sp, #0x70]  \n"
+			"stp x16, x17, [sp, #0x80]  \n"
+			"stp x18, x19, [sp, #0x90]  \n"
+			"stp x20, x21, [sp, #0xa0]  \n"
+			"stp x22, x23, [sp, #0xb0]  \n"
+			"stp x24, x25, [sp, #0xc0]  \n"
+			"stp x26, x27, [sp, #0xd0]  \n"
+			"stp x28, x29, [sp, #0xe0]  \n"
+			"str x30,      [sp, #0xf0]  \n"
+
+			"mov x0, sp        \n" // Switch stacks
+			"str x0, %[old_sp] \n"
+			"ldr x0, =1f       \n"
+			"str x0, %[old_ip] \n"
+			"ldr x0, %[new_sp] \n"
+			"mov sp, x0        \n"
+
+			"ldr x0, %[new_ip] \n"
+			"br x0             \n"
+
+			"1:                         \n"
+			"ldp x0, x1,   [sp, #0x00]  \n" // Load GP
+			"ldp x2, x3,   [sp, #0x10]  \n"
+			"ldp x4, x5,   [sp, #0x20]  \n"
+			"ldp x6, x7,   [sp, #0x30]  \n"
+			"ldp x8, x9,   [sp, #0x40]  \n"
+			"ldp x10, x11, [sp, #0x50]  \n"
+			"ldp x12, x13, [sp, #0x60]  \n"
+			"ldp x14, x15, [sp, #0x70]  \n"
+			"ldp x16, x17, [sp, #0x80]  \n"
+			"ldp x18, x19, [sp, #0x90]  \n"
+			"ldp x20, x21, [sp, #0xa0]  \n"
+			"ldp x22, x23, [sp, #0xb0]  \n"
+			"ldp x24, x25, [sp, #0xc0]  \n"
+			"ldp x26, x27, [sp, #0xd0]  \n"
+			"ldp x28, x29, [sp, #0xe0]  \n"
+			"ldr x30,      [sp, #0xf0]  \n"
+			"add sp, sp,   #248         \n"
+
+			:
+			"=m"(old_thread),
+			"=m"(new_thread),
+			[old_ip] "=m"(old_thread->registers.elr_el1),
+			[old_sp] "=m"(old_thread->registers.sp)
+
+			:
+			[old_thread] "m"(old_thread),
+			[new_thread] "m"(new_thread),
+			[new_ip] "m" (new_thread->registers.elr_el1),
+			[new_sp] "m" (new_thread->registers.sp)
+
+			: "memory", "x0");
+}
+
+void Processor::start_initial_thread(Thread* thread) {
+	asm volatile (
+			"ldr x0, %[new_sp]           \n"
+			"mov sp, x0                  \n"
+			"ldr x0, =thread_first_entry \n"
+			"br x0                       \n"
+
+			:: [new_sp] "m"(thread->registers.sp) : "x0");
+	ASSERT(false);
+}

kernel/arch/aarch64/Processor.h

@@ -4,6 +4,9 @@
 #pragma once
 
 #include <kernel/interrupt/IRQHandler.h>
+#include <kernel/kstd/Arc.h>
+
+class Thread;
 
 class Processor {
 public:
@@ -18,4 +21,7 @@ class Processor {
 	static void send_eoi(int irq);
 	static void disable_interrupts();
 	static void enable_interrupts();
+	static ThreadRegisters initial_thread_registers(bool kernel, size_t entry, size_t user_stack);
+	static void switch_threads(Thread* old_thread, Thread* new_thread);
+	static void start_initial_thread(Thread* thread);
 };

kernel/arch/aarch64/registers.h

@@ -97,5 +97,57 @@ namespace Aarch64::Regs {
 			return ret;
 		}
 	};
+
+	union GPRegisters {
+		uint64_t regs[31];
+		struct {
+			uint64_t x0;
+			uint64_t x1;
+			uint64_t x2;
+			uint64_t x3;
+			uint64_t x4;
+			uint64_t x5;
+			uint64_t x6;
+			uint64_t x7;
+			uint64_t x8;
+			uint64_t x9;
+			uint64_t x10;
+			uint64_t x11;
+			uint64_t x12;
+			uint64_t x13;
+			uint64_t x14;
+			uint64_t x15;
+			uint64_t x16;
+			uint64_t x17;
+			uint64_t x18;
+			uint64_t x19;
+			uint64_t x20;
+			uint64_t x21;
+			uint64_t x22;
+			uint64_t x23;
+			uint64_t x24;
+			uint64_t x25;
+			uint64_t x26;
+			uint64_t x27;
+			uint64_t x28;
+			uint64_t x29;
+			uint64_t x30;
+		};
+	};
 }
+
+struct ISRRegisters {};
+struct ThreadRegisters {
+	Aarch64::Regs::GPRegisters gp;
+	uint64_t sp;
+	uint64_t spsr_el1;
+	uint64_t elr_el1;
+	uint64_t tpidr_el0;
+	uint64_t ttbr0_el1;
+};
+struct IRQRegisters {};
+struct TrapFrame {
+	TrapFrame* prev;
+};
+
 #endif

kernel/arch/i386/Processor.cpp

@@ -8,6 +8,7 @@
 #include "isr.h"
 #include "irq.h"
 #include "idt.h"
+#include <kernel/tasking/TaskManager.h>
 
 char Processor::s_vendor[sizeof(uint32_t) * 3 + 1];
 CPUFeatures Processor::s_features = {};
@@ -90,3 +91,29 @@ void Processor::disable_interrupts() {
 void Processor::enable_interrupts() {
 	asm volatile ("sti");
 }
+
+ThreadRegisters Processor::initial_thread_registers(bool kernel, size_t entry, size_t user_stack) {
+	ThreadRegisters registers;
+	registers.iret.eflags = 0x202;
+	registers.iret.cs = kernel ? 0x8 : 0x1B;
+	registers.iret.eip = entry;
+	registers.gp.eax = 0;
+	registers.gp.ebx = 0;
+	registers.gp.ecx = 0;
+	registers.gp.edx = 0;
+	registers.gp.ebp = user_stack;
+	registers.gp.edi = 0;
+	registers.gp.esi = 0;
+	if (kernel) {
+		registers.seg.ds = 0x10; // ds
+		registers.seg.es = 0x10; // es
+		registers.seg.fs = 0x10; // fs
+		registers.seg.gs = 0x10; // gs
+	} else {
+		registers.seg.ds = 0x23; // ds
+		registers.seg.es = 0x23; // es
+		registers.seg.fs = 0x23; // fs
+		registers.seg.gs = 0x23; // gs
+	}
+	return registers;
+}

kernel/arch/i386/Processor.h

@@ -5,8 +5,11 @@
 
 #include "../../api/stdint.h"
 #include "CPUID.h"
+#include "registers.h"
+#include <kernel/kstd/Arc.h>
 
 class IRQHandler;
+class Thread;
 
 class Processor {
 public:
@@ -25,6 +28,7 @@ class Processor {
 	static void send_eoi(int irq);
 	static void disable_interrupts();
 	static void enable_interrupts();
+	static ThreadRegisters initial_thread_registers(bool kernel, size_t entry, size_t user_stack);
 
 
 private:

kernel/arch/i386/isr.cpp

@@ -28,7 +28,7 @@
 #include <kernel/tasking/Thread.h>
 #include <kernel/tasking/Process.h>
 #include <kernel/KernelMapper.h>
-#include <kernel/arch/i386/registers.h>
+#include <kernel/arch/registers.h>
 
 namespace Interrupt {
 	TSS fault_tss;

kernel/arch/registers.h

@@ -5,4 +5,6 @@
 
 #if defined(__i386__)
 #include "i386/registers.h"
+#elif defined(__aarch64__)
+#include "aarch64/registers.h"
 #endif

kernel/interrupt/IRQHandler.h

@@ -20,7 +20,7 @@
 #pragma once
 
 #include <kernel/kstd/kstddef.h>
-#include <kernel/arch/i386/registers.h>
+#include <kernel/arch/registers.h>
 
 class IRQHandler {
 public:

kernel/memory/Memory.h

@@ -5,7 +5,7 @@
 
 #include "../kstd/kstddef.h"
 #include "../api/page_size.h"
-#include <kernel/arch/i386/registers.h>
+#include <kernel/arch/registers.h>
 
 #if defined(__i386__)
 #define HIGHER_HALF 0xC0000000