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✨ Sorting designed SiDB gates #552
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…irst operational gate is designed
… that certified the status `OPERATIONAL`
# Conflicts: # include/fiction/algorithms/physical_design/design_sidb_gates.hpp
Signed-off-by: GitHub Actions <actions@github.com>
Signed-off-by: GitHub Actions <actions@github.com>
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clang-tidy made some suggestions
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…ned_gates_sorting # Conflicts: # include/fiction/algorithms/physical_design/design_sidb_gates.hpp
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@wlambooy is this PR still under active development, or can it be closed? |
I actually started merging it with main yesterday (big task in this case). It is a good starting point for the advanced circuit design I'm getting into. I'll let you know if this PR will stay or if it will be part of a different one. |
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clang-tidy made some suggestions
Hi @wlambooy, Many thanks for your hard work! Before I give you detailed feedback, could you, as we have discussed, extend the benchmark with gate design and operational domain? It will be super helpful in the future, especially for changes like this one. Many thanks! |
I see now that I misread your comment; I added a specific benchmark for For Let me know if you think this is good :). |
That's great! Thank you! |
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using namespace fiction; | ||
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TEST_CASE("Benchmark exact operational assessment", "[benchmark]") |
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@wlambooy would it be possible to also test the different options for strategy_to_analyze_operational_status
? Many thanks! 🙏
Description
This PR introduces an extension to
is_operational
anddesign_sidb_gates
. The former is now able to return the simulation results that certify the statusOPERATIONAL
, which may then be used by the extension to the latter, which uses the simulation results to return the designed layouts in a specific ordering. This PR implements a simple heuristic for this ordering, namely it prefers the layouts for the the ground state isolation is large, ie., the energetic gap between the ground state and the first excited state. Specifically, it sorts by the minimum ground state isolation for each input.To use this new feature when designing SiDB gates, make sure that all combinations are enumerated, and set the
post_design_process
parameter toPREFER_ENERGETICALLY_ISOLATED_GROUND_STATES
.Checklist: