🎯
Focusing
Postdoc at EPFL studying EDA, focusing on synthesis, verification, and AI applications of emerging computing systems. Open to collaborations on research.
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École Polytechnique Fédérale de Lausanne
- Laussane, Switzerland
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15:10
(UTC +01:00) - https://changmg.github.io/
Highlights
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SJTU-ECTL/ALSRAC
SJTU-ECTL/ALSRAC PublicALSRAC: Approximate Logic Synthesis by Resubstitution with Approximate Care Set
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SJTU-ECTL/VECBEE
SJTU-ECTL/VECBEE PublicVECBEE: A Versatile Efficiency-Accuracy Configurable Batch Error Estimation Method for Greedy Approximate Logic Synthesis
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SJTU-ECTL/MECALS
SJTU-ECTL/MECALS PublicAn approximate logic synthesis tool under the maximum error constraint
Verilog 6
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AppMult-Aware-Retraining
AppMult-Aware-Retraining PublicPytorch implementation of approximate multiplier-aware retraining for DNNs, DATE 2025
C++ 1
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