fix errors

chipsalliance · Aug 1, 2024 · a380c60 · a380c60
1 parent fac3e32
commit a380c60
Show file tree

Hide file tree

Showing 7 changed files with 8 additions and 396 deletions.
diff --git a/configgen/generated/blastoise.json b/configgen/generated/blastoise.json
@@ -6,86 +6,6 @@
       "Zve32f"
     ],
     "t1customInstructions": [],
-    "lsuBankParameters": [
-      {
-        "name": "scalar",
-        "region": "b00??????????????????????????????",
-        "beatbyte": 8,
-        "accessScalar": true
-      },
-      {
-        "name": "ddrBank0",
-        "region": "b01???????????????????????00?????\nb10???????????????????????00?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "ddrBank1",
-        "region": "b01???????????????????????01?????\nb10???????????????????????01?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "ddrBank2",
-        "region": "b01???????????????????????10?????\nb10???????????????????????10?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "ddrBank3",
-        "region": "b01???????????????????????11?????\nb10???????????????????????11?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank0",
-        "region": "b11000000000?????????????000?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank1",
-        "region": "b11000000000?????????????001?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank2",
-        "region": "b11000000000?????????????010?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank3",
-        "region": "b11000000000?????????????011?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank4",
-        "region": "b11000000000?????????????100?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank5",
-        "region": "b11000000000?????????????101?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank6",
-        "region": "b11000000000?????????????110?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank7",
-        "region": "b11000000000?????????????111?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      }
-    ],
     "vrfBankSize": 1,
     "vrfRamType": "org.chipsalliance.t1.rtl.vrf.RamType.p0rwp1rw",
     "vfuInstantiateParameter": {
@@ -246,7 +166,8 @@
             3
           ]
         ]
-      ]
+      ],
+      "zvbbModuleParameters": []
     }
   },
   "generator": "org.chipsalliance.t1.rtl.T1"

diff --git a/configgen/generated/machamp.json b/configgen/generated/machamp.json
@@ -6,86 +6,6 @@
       "Zve32x"
     ],
     "t1customInstructions": [],
-    "lsuBankParameters": [
-      {
-        "name": "scalar",
-        "region": "b00??????????????????????????????",
-        "beatbyte": 8,
-        "accessScalar": true
-      },
-      {
-        "name": "ddrBank0",
-        "region": "b01??????????????????????00??????\nb10??????????????????????00??????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "ddrBank1",
-        "region": "b01??????????????????????01??????\nb10??????????????????????01??????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "ddrBank2",
-        "region": "b01??????????????????????10??????\nb10??????????????????????10??????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "ddrBank3",
-        "region": "b01??????????????????????11??????\nb10??????????????????????11??????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank0",
-        "region": "b11000000000????????????000??????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank1",
-        "region": "b11000000000????????????001??????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank2",
-        "region": "b11000000000????????????010??????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank3",
-        "region": "b11000000000????????????011??????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank4",
-        "region": "b11000000000????????????100??????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank5",
-        "region": "b11000000000????????????101??????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank6",
-        "region": "b11000000000????????????110??????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank7",
-        "region": "b11000000000????????????111??????",
-        "beatbyte": 8,
-        "accessScalar": false
-      }
-    ],
     "vrfBankSize": 2,
     "vrfRamType": "org.chipsalliance.t1.rtl.vrf.RamType.p0rp1w",
     "vfuInstantiateParameter": {
@@ -230,7 +150,8 @@
           ]
         ]
       ],
-      "floatModuleParameters": []
+      "floatModuleParameters": [],
+      "zvbbModuleParameters": []
     }
   },
   "generator": "org.chipsalliance.t1.rtl.T1"

diff --git a/configgen/generated/psyduck.json b/configgen/generated/psyduck.json
@@ -7,86 +7,6 @@
       "Zvbb"
     ],
     "t1customInstructions": [],
-    "lsuBankParameters": [
-      {
-        "name": "scalar",
-        "region": "b00??????????????????????????????",
-        "beatbyte": 8,
-        "accessScalar": true
-      },
-      {
-        "name": "ddrBank0",
-        "region": "b01???????????????????????00?????\nb10???????????????????????00?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "ddrBank1",
-        "region": "b01???????????????????????01?????\nb10???????????????????????01?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "ddrBank2",
-        "region": "b01???????????????????????10?????\nb10???????????????????????10?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "ddrBank3",
-        "region": "b01???????????????????????11?????\nb10???????????????????????11?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank0",
-        "region": "b11000000000?????????????000?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank1",
-        "region": "b11000000000?????????????001?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank2",
-        "region": "b11000000000?????????????010?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank3",
-        "region": "b11000000000?????????????011?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank4",
-        "region": "b11000000000?????????????100?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank5",
-        "region": "b11000000000?????????????101?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank6",
-        "region": "b11000000000?????????????110?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      },
-      {
-        "name": "sramBank7",
-        "region": "b11000000000?????????????111?????",
-        "beatbyte": 8,
-        "accessScalar": false
-      }
-    ],
     "vrfBankSize": 1,
     "vrfRamType": "org.chipsalliance.t1.rtl.vrf.RamType.p0rwp1rw",
     "vfuInstantiateParameter": {