[t1rocket] Add layer and ltl support #740
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- generate parameter json: mill elaborator.runMain org.chipsalliance.t1.elaborator.t1rocketv.T1RocketTile config --instructionSets rv32_i --instructionSets rv_a --instructionSets rv_v --instructionSets Zve32x --instructionSets zvl1024b --cacheBlockBytes 32 --nPMPs 8 --cacheable 80000000-ffffffff --sideEffects 00000000-1fffffff --dcacheNSets 64 --dcacheNWays 4 --dcacheRowBits 32 --iCacheNSets 32 --iCacheNWays 4 --iCachePrefetch false --dLen 256 --vrfBankSize 2 --vrfRamType p0rp1w - generate verilog: mill elaborator.runMain org.chipsalliance.t1.elaborator.t1rocketv.T1RocketTile design --parameter ./T1RocketTile.json --run-firtool
nix develop ".#t1.elaborator.editable" -c mill -i elaborator.runMain org.chipsalliance.t1.elaborator.t1rocketv.T1RocketTile config --instructionSets rv32_i --instructionSets rv_a --instructionSets rv_v --instructionSets Zve32x --instructionSets zvl1024b --cacheBlockBytes 32 --nPMPs 8 --cacheable 80000000-ffffffff --sideEffects 00000000-1fffffff --dcacheNSets 64 --dcacheNWays 4 --dcacheRowBits 32 --iCacheNSets 32 --iCacheNWays 4 --iCachePrefetch false --dLen 256 --vrfBankSize 2 --vrfRamType p0rp1w --instructionSets rv_c
[t1rocket] update t1rocketemu TestBench.scala to build the config json
[t1rocket] refactor load_from_payload function to improve readability and performance [t1rocket] add elf crate dependency
[t1rocket] add timeout check [t1rocket] use t1rocket_cosim_init instead of cosim_init to expose link bug
Signed-off-by: Avimitin <dev@avimit.in>
Signed-off-by: Avimitin <dev@avimit.in>
[t1rocket] fix wrong get_resetvector [t1rocket] fix unsafe extern "C" function signatures in dpi.rs [t1rocket] update axi_read_load_store function to use correct size parameter [t1rocket] add probes [t1rocket] add last commit cycle during axi to control timeout [t1rocket] add vrf score board check [t1rocket] refactor event's name in offline difftest
Signed-off-by: Avimitin <dev@avimit.in>
Signed-off-by: Avimitin <dev@avimit.in>
Signed-off-by: Avimitin <dev@avimit.in>
Signed-off-by: Avimitin <dev@avimit.in>
Signed-off-by: Avimitin <dev@avimit.in>
Signed-off-by: Avimitin <dev@avimit.in>
We don't need this since we are using OM to get rtl design now. Signed-off-by: Avimitin <dev@avimit.in>
Signed-off-by: Avimitin <dev@avimit.in>
Signed-off-by: Avimitin <dev@avimit.in>
Signed-off-by: Avimitin <dev@avimit.in>
Signed-off-by: Avimitin <dev@avimit.in>
Signed-off-by: Avimitin <dev@avimit.in>
Signed-off-by: Avimitin <dev@avimit.in>
Signed-off-by: Avimitin <dev@avimit.in>
Signed-off-by: Avimitin <dev@avimit.in>
Signed-off-by: Avimitin <dev@avimit.in>
This reverts commit 589deb8.
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