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CMI: bugfix on -1 register reads; add register writes verification.
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crazii committed Jan 23, 2024
1 parent ec1d6d3 commit e5730b0
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Showing 2 changed files with 91 additions and 64 deletions.
4 changes: 2 additions & 2 deletions mpxplay/au_cards/au_cards.c
Original file line number Diff line number Diff line change
Expand Up @@ -865,10 +865,10 @@ static int AU_getmixer_one(struct mpxplay_audioout_info_s *aui,unsigned int mixc
return value;
}

#define AU_MIXCHANS_OUTS 4
#define AU_MIXCHANS_OUTS 5

static const unsigned int au_mixchan_outs[AU_MIXCHANS_OUTS]={
AU_MIXCHAN_MASTER,AU_MIXCHAN_PCM,AU_MIXCHAN_HEADPHONE,AU_MIXCHAN_SPDIFOUT};
AU_MIXCHAN_MASTER,AU_MIXCHAN_PCM,AU_MIXCHAN_HEADPHONE,AU_MIXCHAN_SPDIFOUT,AU_MIXCHAN_SYNTH};

void AU_setmixer_outs(struct mpxplay_audioout_info_s *aui,unsigned int setmode,int newvalue)
{
Expand Down
151 changes: 89 additions & 62 deletions mpxplay/au_cards/sc_cmi.c
Original file line number Diff line number Diff line change
Expand Up @@ -21,6 +21,8 @@
#define CMI_DEBUG_OUTPUT stdout

#include "au_cards.h"
#define _LOG_ENABLE 0
#include "../../sbemu/dpmi/dbgutil.h"

#ifdef AU_CARDS_LINK_CMI8X38

Expand Down Expand Up @@ -129,6 +131,7 @@
#define CM_CH0BUSY 0x00000004
#define CM_CHINT1 0x00000002
#define CM_CHINT0 0x00000001
#define CM_INTR_MASK (CM_INTR|CM_UARTINT|CM_LTDMAINT|CM_HTDMAINT|CM_CHINT1|CM_CHINT0)

#define CM_REG_LEGACY_CTRL 0x14
#define CM_NXCHG 0x80000000 /* h/w multi channels? */
Expand Down Expand Up @@ -256,7 +259,7 @@
*/
#define CM_REG_FM_PCI 0x50

#define CM_REG_EXT_MISC 0x90
#define CM_REG_EXT_MISC 0x90

/*
* for CMI-8338 .. this is not valid for CMI-8738.
Expand Down Expand Up @@ -299,8 +302,8 @@
/*
* pci ids
*/
#define PCI_DEVICE_ID_CMEDIA_CM8338A 0x0100
#define PCI_DEVICE_ID_CMEDIA_CM8338B 0x0101
#define PCI_DEVICE_ID_CMEDIA_CM8338A 0x0100
#define PCI_DEVICE_ID_CMEDIA_CM8338B 0x0101
#define PCI_DEVICE_ID_CMEDIA_CM8738 0x0111
#define PCI_DEVICE_ID_CMEDIA_CM8738B 0x0112

Expand Down Expand Up @@ -377,47 +380,52 @@ typedef struct cmi8x38_card

}cmi8x38_card;

static void cmi8x38_ac97_write(unsigned int baseport,unsigned int reg, unsigned int value);
static unsigned int cmi8x38_ac97_read(unsigned int baseport, unsigned int reg);
static void CMI8X38_choose_mixerset(struct cmi8x38_card *card);

extern unsigned int intsoundconfig,intsoundcontrol;

//-------------------------------------------------------------------------
// low level write & read

#define snd_cmipci_write_8(cm,reg,data) outb(cm->iobase+reg,data)
#define snd_cmipci_write_16(cm,reg,data) outw(cm->iobase+reg,data)
#define snd_cmipci_write_32(cm,reg,data) outl(cm->iobase+reg,data)
#define snd_cmipci_read_8(cm,reg) inb(cm->iobase+reg)
#define snd_cmipci_write_8(cm,reg,data) do { outb(cm->iobase+reg,data); _LOG("%x: %x %x\n",reg,data,inb(cm->iobase+reg)); } while(cm->chip_version<=37 && inb(cm->iobase+reg) != (data))
#define snd_cmipci_write_8nv(cm,reg,data) do { outb(cm->iobase+reg,data); _LOG("%x: %x %x\n",reg,data,inb(cm->iobase+reg)); } while(0)
#define snd_cmipci_write_16(cm,reg,data) do { outw(cm->iobase+reg,data); _LOG("%x: %x %x\n",reg,data,inw(cm->iobase+reg)); } while(cm->chip_version<=37 && inw(cm->iobase+reg) != (data))
#define snd_cmipci_write_16nv(cm,reg,data) do { outw(cm->iobase+reg,data); _LOG("%x: %x %x\n",reg,data,inw(cm->iobase+reg)); } while(0)
#define snd_cmipci_write_32(cm,reg,data) do { outl(cm->iobase+reg,data); _LOG("%x: %x %x\n",reg,data,inl(cm->iobase+reg)); } while(cm->chip_version<=37 && inl(cm->iobase+reg) != (data))
#define snd_cmipci_write_32m(cm,reg,data,mask) do { outl(cm->iobase+reg,data); _LOG("%x: %x %x\n",reg,data,inl(cm->iobase+reg)); } while(cm->chip_version<=37 && (inl(cm->iobase+reg)&(mask)) != ((data)&mask))
#define snd_cmipci_read_8(cm,reg) inb(cm->iobase+reg);
#define snd_cmipci_read_16(cm,reg) inw(cm->iobase+reg)
#define snd_cmipci_read_32(cm,reg) inl(cm->iobase+reg)

static void snd_cmipci_set_bit(cmi8x38_card *cm, unsigned int cmd, unsigned int flag)
{
unsigned int val;
do {
val = snd_cmipci_read_32(cm, cmd);
_LOG("%x %x\n",cmd, val);
} while(val == -1 && cm->chip_version <= 37);
val|= flag;
snd_cmipci_write_32(cm, cmd, val);
}

static void snd_cmipci_clear_bit(cmi8x38_card *cm, unsigned int cmd, unsigned int flag)
{
unsigned int val;
do {
val = snd_cmipci_read_32(cm, cmd);
_LOG("%x %x\n",cmd, val);
} while(val == -1 && cm->chip_version <= 37);
val&= ~flag;
snd_cmipci_write_32(cm, cmd, val);
}

static void snd_cmipci_mixer_write(cmi8x38_card *cm, unsigned char idx, unsigned char data)
{
snd_cmipci_write_8(cm, CM_REG_SB16_ADDR, idx);
snd_cmipci_write_8(cm, CM_REG_SB16_DATA, data);
snd_cmipci_write_8nv(cm, CM_REG_SB16_ADDR, idx);
snd_cmipci_write_8nv(cm, CM_REG_SB16_DATA, data);
}

static unsigned int snd_cmipci_mixer_read(cmi8x38_card *cm, unsigned char idx)
{
snd_cmipci_write_8(cm, CM_REG_SB16_ADDR, idx);
snd_cmipci_write_8nv(cm, CM_REG_SB16_ADDR, idx);
return snd_cmipci_read_8(cm, CM_REG_SB16_DATA);
}

Expand All @@ -435,12 +443,15 @@ static unsigned int snd_cmipci_rate_freq(unsigned int rate)
return 7; // 48k
}

static void snd_cmipci_ch_reset(cmi8x38_card *cm, int ch) //reset ADC channel 1
static void snd_cmipci_ch_reset(cmi8x38_card *cm, int ch) //reset channel ch
{
int reset = CM_RST_CH0 << ch;
snd_cmipci_write_32(cm, CM_REG_FUNCTRL0, CM_CHADC1 | reset);
snd_cmipci_write_32(cm, CM_REG_FUNCTRL0, CM_CHADC1 & (~reset));
pds_delay_10us(1);
int adcch = CM_CHADC0 << ch;
snd_cmipci_write_32(cm, CM_REG_FUNCTRL0, adcch|reset);
do {pds_delay_10us(10); printf("%x\n",snd_cmipci_read_32(cm,CM_REG_FUNCTRL0));} while(!(snd_cmipci_read_32(cm,CM_REG_FUNCTRL0)&reset));
snd_cmipci_write_32(cm, CM_REG_FUNCTRL0, adcch&(~reset));
do {pds_delay_10us(10);} while((snd_cmipci_read_32(cm,CM_REG_FUNCTRL0)&reset));
pds_mdelay(5);
}

static int set_dac_channels(cmi8x38_card *cm, int channels)
Expand Down Expand Up @@ -474,7 +485,6 @@ static int set_dac_channels(cmi8x38_card *cm, int channels)
snd_cmipci_clear_bit(cm, CM_REG_LEGACY_CTRL, CM_CHB3D6C);
snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_ENCENTER);
}
//}
return 0;
}

Expand Down Expand Up @@ -533,16 +543,23 @@ static void cmi8x38_chip_init(struct cmi8x38_card *cm)
cm->chip_version = 0;
cm->max_channels = 2;
if (cm->pci_dev->device_id != PCI_DEVICE_ID_CMEDIA_CM8338A &&
cm->pci_dev->device_id != PCI_DEVICE_ID_CMEDIA_CM8338B)
cm->pci_dev->device_id != PCI_DEVICE_ID_CMEDIA_CM8338B)
query_chip(cm);

mpxplay_debugf(CMI_DEBUG_OUTPUT, "chip version: %d, multi_chan: %d", cm->chip_version, cm->can_multi_ch);

/* initialize codec registers */
snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_RESET); //reset DSP/Bus master
pds_delay_10us(10);
do {pds_delay_10us(10);} while(!(snd_cmipci_read_32(cm, CM_REG_MISC_CTRL)&CM_RESET));
snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_RESET); //release reset
pds_delay_10us(10);
//choose the right mixerset based on chip_version
CMI8X38_choose_mixerset(cm);
do {pds_delay_10us(10);} while((snd_cmipci_read_32(cm, CM_REG_MISC_CTRL)&CM_RESET));
pds_mdelay(10);

mpxplay_debugf(CMI_DEBUG_OUTPUT, "FUNCTRL0: %x", snd_cmipci_read_32(cm, CM_REG_FUNCTRL0));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "FUNCTRL1: %x", snd_cmipci_read_32(cm, CM_REG_FUNCTRL1));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "LEGCCTRL: %x", snd_cmipci_read_32(cm, CM_REG_LEGACY_CTRL));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "MISCCTRL: %x", snd_cmipci_read_32(cm, CM_REG_MISC_CTRL));

if(cm->chip_version <= 37)
pcibios_WriteConfig_Dword(cm->pci_dev, 0x40, 0); //disable DMA slave

Expand All @@ -552,15 +569,15 @@ static void cmi8x38_chip_init(struct cmi8x38_card *cm)
snd_cmipci_write_32(cm, CM_REG_FUNCTRL0, 0); /* disable channels */
snd_cmipci_write_32(cm, CM_REG_FUNCTRL1, 0);

snd_cmipci_write_32(cm, CM_REG_CHFORMAT, 0);
mpxplay_debugf(CMI_DEBUG_OUTPUT, "FUNCTRL0: %x", snd_cmipci_read_32(cm, CM_REG_FUNCTRL0));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "FUNCTRL1: %x", snd_cmipci_read_32(cm, CM_REG_FUNCTRL1));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "LEGCCTRL: %x", snd_cmipci_read_32(cm, CM_REG_LEGACY_CTRL));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "MISCCTRL: %x", snd_cmipci_read_32(cm, CM_REG_MISC_CTRL));

snd_cmipci_write_32m(cm, CM_REG_CHFORMAT, 0, 0xFFFFFF);
snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_ENDBDAC|CM_N4SPK3D);
snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC);

//magic from Linux source
if (cm->chip_version) {
snd_cmipci_write_8(cm, CM_REG_EXT_MISC, 0x20); /* magic */
snd_cmipci_write_8(cm, CM_REG_EXT_MISC + 1, 0x09); /* more magic */
}
snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL|CM_AC3EN2); //disable 32bit PCM/AC3

/* Set Bus Master Request */
Expand All @@ -583,6 +600,12 @@ static void cmi8x38_chip_init(struct cmi8x38_card *cm)

/* reset mixer */
snd_cmipci_mixer_write(cm, 0, 0);

mpxplay_debugf(CMI_DEBUG_OUTPUT, "FUNCTRL0: %x", snd_cmipci_read_32(cm, CM_REG_FUNCTRL0));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "FUNCTRL1: %x", snd_cmipci_read_32(cm, CM_REG_FUNCTRL1));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "LEGCCTRL: %x", snd_cmipci_read_32(cm, CM_REG_LEGACY_CTRL));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "MISCCTRL: %x", snd_cmipci_read_32(cm, CM_REG_MISC_CTRL));

}

static void cmi8x38_chip_close(struct cmi8x38_card *cm)
Expand Down Expand Up @@ -746,12 +769,22 @@ static void CMI8X38_setrate(struct mpxplay_audioout_info_s *aui)
// card->dma_size = (card->dma_size * aui->chan_card) / 2;
// card->period_size = (card->period_size * aui->chan_card) / 2;
//}
mpxplay_debugf(CMI_DEBUG_OUTPUT, "0FUNCTRL0: %x", snd_cmipci_read_32(card, CM_REG_FUNCTRL0));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "FUNCTRL1: %x", snd_cmipci_read_32(card, CM_REG_FUNCTRL1));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "LEGCCTRL: %x", snd_cmipci_read_32(card, CM_REG_LEGACY_CTRL));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "MISCCTRL: %x", snd_cmipci_read_32(card, CM_REG_MISC_CTRL));


// set buffer address
snd_cmipci_write_32(card, CM_REG_CH0_FRAME1, (uint32_t) pds_cardmem_physicalptr(card->dm, card->pcmout_buffer));
// program sample counts
snd_cmipci_write_16(card, CM_REG_CH0_FRAME2 , card->dma_size - 1);
snd_cmipci_write_16(card, CM_REG_CH0_FRAME2 + 2, card->period_size - 1);
snd_cmipci_write_16nv(card, CM_REG_CH0_FRAME2 , card->dma_size - 1);
snd_cmipci_write_16nv(card, CM_REG_CH0_FRAME2 + 2, card->period_size - 1);

mpxplay_debugf(CMI_DEBUG_OUTPUT, "1FUNCTRL0: %x", snd_cmipci_read_32(card, CM_REG_FUNCTRL0));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "FUNCTRL1: %x", snd_cmipci_read_32(card, CM_REG_FUNCTRL1));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "LEGCCTRL: %x", snd_cmipci_read_32(card, CM_REG_LEGACY_CTRL));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "MISCCTRL: %x", snd_cmipci_read_32(card, CM_REG_MISC_CTRL));

// set sample rate
freqnum = snd_cmipci_rate_freq(aui->freq_card);
Expand All @@ -763,6 +796,12 @@ static void CMI8X38_setrate(struct mpxplay_audioout_info_s *aui)
val |= (freqnum << CM_DSFC_SHIFT) & CM_DSFC_MASK;
snd_cmipci_write_32(card, CM_REG_FUNCTRL1, val);

mpxplay_debugf(CMI_DEBUG_OUTPUT, "2FUNCTRL0: %x", snd_cmipci_read_32(card, CM_REG_FUNCTRL0));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "FUNCTRL1: %x", snd_cmipci_read_32(card, CM_REG_FUNCTRL1));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "LEGCCTRL: %x", snd_cmipci_read_32(card, CM_REG_LEGACY_CTRL));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "MISCCTRL: %x", snd_cmipci_read_32(card, CM_REG_MISC_CTRL));


// set format
val = snd_cmipci_read_32(card, CM_REG_CHFORMAT);

Expand All @@ -771,7 +810,13 @@ static void CMI8X38_setrate(struct mpxplay_audioout_info_s *aui)

val &= ~CM_CH0FMT_MASK;
val |= card->fmt << CM_CH0FMT_SHIFT;
snd_cmipci_write_32(card, CM_REG_CHFORMAT, val);
snd_cmipci_write_32m(card, CM_REG_CHFORMAT, val, 0xFFFFFF);
pds_mdelay(10);
mpxplay_debugf(CMI_DEBUG_OUTPUT, "3CHFORMAT: %x", snd_cmipci_read_32(card, CM_REG_CHFORMAT));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "FUNCTRL0: %x", snd_cmipci_read_32(card, CM_REG_FUNCTRL0));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "FUNCTRL1: %x", snd_cmipci_read_32(card, CM_REG_FUNCTRL1));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "LEGCCTRL: %x", snd_cmipci_read_32(card, CM_REG_LEGACY_CTRL));
mpxplay_debugf(CMI_DEBUG_OUTPUT, "MISCCTRL: %x", snd_cmipci_read_32(card, CM_REG_MISC_CTRL));

// set SPDIF
//if((aui->freq_card==44100 || aui->freq_card==48000) && (aui->chan_card==2) && (aui->bits_card==16))
Expand Down Expand Up @@ -836,6 +881,7 @@ static long CMI8X38_getbufpos(struct mpxplay_audioout_info_s *aui)
return aui->card_dma_lastgoodpos;
ok:
bufpos = (card->dma_size - (rem + 1)) << card->shift;
//_LOG("bufpos: %d %d\n", rem, bufpos);
#endif

if (bufpos < aui->card_dmasize)
Expand All @@ -854,12 +900,14 @@ static void CMI8X38_clearbuf(struct mpxplay_audioout_info_s *aui)
static void CMI8X38_writeMIXER(struct mpxplay_audioout_info_s *aui,unsigned long reg, unsigned long val)
{
struct cmi8x38_card *card=aui->card_private_data;
//_LOG("write mixer: %x, %x->%x\n", reg, snd_cmipci_mixer_read(card,reg), val);
snd_cmipci_mixer_write(card,reg,val);
}

static unsigned long CMI8X38_readMIXER(struct mpxplay_audioout_info_s *aui,unsigned long reg)
{
struct cmi8x38_card *card=aui->card_private_data;
//_LOG("read mixer: %x, %x\n", reg, snd_cmipci_mixer_read(card,reg));
return snd_cmipci_mixer_read(card,reg);
}

Expand All @@ -868,7 +916,9 @@ static int CMI8X38_IRQRoutine(mpxplay_audioout_info_s* aui)
{
cmi8x38_card *card=aui->card_private_data;
int status = snd_cmipci_read_32(card, CM_REG_INT_STATUS); //read only reg (R)
if (!(status & CM_INTR)) {
//if(status != -1) _LOG("INTR: %x\n", status);
if ( card->chip_version > 37 && !(status&CM_INTR) ||
card->chip_version <= 37 && !(status & CM_INTR_MASK)) { //the summary bit is incorrect for PCI-SX, the interrupt be chained to other shared IRQ device with invalid interrupts
return 0;
}
if(status&CM_MCBINT) //Abort conditions occur during PCI Bus Target/Master Access
Expand All @@ -879,12 +929,12 @@ static int CMI8X38_IRQRoutine(mpxplay_audioout_info_s* aui)
{

}
unsigned int mask = CM_TDMA_INT_EN;
unsigned int mask = 0;
if (status & CM_CHINT0)
mask |= CM_CH0_INT_EN;
if (status & CM_CHINT1)
mask |= CM_CH1_INT_EN;
snd_cmipci_clear_bit(card, CM_REG_INT_HLDCLR, mask); //set to 0 will disable other interrupt. or write 0 and then with full ENs will work.
snd_cmipci_clear_bit(card, CM_REG_INT_HLDCLR, mask|CM_TDMA_INT_EN); //set to 0 will disable other interrupt. or write 0 and then with full ENs will work.
snd_cmipci_set_bit(card, CM_REG_INT_HLDCLR, mask); //re-enable hold
return 1;
}
Expand All @@ -897,7 +947,8 @@ static aucards_onemixerchan_s cmi8x38_synth_vol={AU_MIXCHANFUNCS_PACK(AU_MIXCHAN
static aucards_onemixerchan_s cmi8x38_cdin_vol={AU_MIXCHANFUNCS_PACK(AU_MIXCHAN_CDIN,AU_MIXCHANFUNC_VOLUME), 2,{{0x36,31,3,0},{0x37,31,3,0}}};
static aucards_onemixerchan_s cmi8x38_linein_vol={AU_MIXCHANFUNCS_PACK(AU_MIXCHAN_LINEIN,AU_MIXCHANFUNC_VOLUME),2,{{0x38,31,3,0},{0x39,31,3,0}}};
static aucards_onemixerchan_s cmi8x38_micin_vol={AU_MIXCHANFUNCS_PACK(AU_MIXCHAN_MICIN,AU_MIXCHANFUNC_VOLUME), 1,{{0x3A,31,3,0}}};
static aucards_onemixerchan_s cmi8x38_auxin_vol={AU_MIXCHANFUNCS_PACK(AU_MIXCHAN_AUXIN,AU_MIXCHANFUNC_VOLUME), 2,{{0x26,15,4,0},{0x26,15,0,0}}}; //??? in or out?
//FM for SBPro - don't write to it as in previous SBPro mixer test it might be reserved.
//static aucards_onemixerchan_s cmi8x38_auxin_vol={AU_MIXCHANFUNCS_PACK(AU_MIXCHAN_AUXIN,AU_MIXCHANFUNC_VOLUME), 2,{{0x26,15,4,0},{0x26,15,0,0}}}; //??? in or out?

static aucards_allmixerchan_s cmi8x38_mixerset[]={
&cmi8x38_master_vol,
Expand All @@ -906,24 +957,10 @@ static aucards_allmixerchan_s cmi8x38_mixerset[]={
&cmi8x38_cdin_vol,
&cmi8x38_linein_vol,
&cmi8x38_micin_vol,
&cmi8x38_auxin_vol,
NULL
};

//8338/8738/PCI-SX. they don't have SB16 compatible mixers on datasheet, but SBPro compatible mixers
//like SBPro
static aucards_onemixerchan_s cmi8x38_037_master_vol={AU_MIXCHANFUNCS_PACK(AU_MIXCHAN_MASTER,AU_MIXCHANFUNC_VOLUME),2,{{0x22,15,4,0},{0x22,15,0,0}}};
static aucards_onemixerchan_s cmi8x38_037_pcm_vol ={AU_MIXCHANFUNCS_PACK(AU_MIXCHAN_PCM,AU_MIXCHANFUNC_VOLUME) ,2,{{0x04,15,4,0},{0x04,15,0,0}}};
static aucards_onemixerchan_s cmi8x38_037_synth_vol ={AU_MIXCHANFUNCS_PACK(AU_MIXCHAN_SYNTH,AU_MIXCHANFUNC_VOLUME) ,2,{{0x26,15,4,0},{0x26,15,0,0}}};

static aucards_allmixerchan_s cmi8x38_037_mixerset[]={
&cmi8x38_037_master_vol,
&cmi8x38_037_pcm_vol,
&cmi8x38_037_synth_vol,
//&cmi8x38_auxin_vol,
NULL
};


one_sndcard_info CMI8X38_sndcard_info={
"CMI 8338/8738",
SNDCARD_LOWLEVELHAND|SNDCARD_INT08_ALLOWED,
Expand Down Expand Up @@ -952,14 +989,4 @@ one_sndcard_info CMI8X38_sndcard_info={
&cmi8x38_mixerset[0]
};

static void CMI8X38_choose_mixerset(struct cmi8x38_card *card)
{
if(card->chip_version <= 37)
{
snd_cmipci_write_8(card, CM_REG_MIXERC, snd_cmipci_read_8(card, CM_REG_MIXERC)&~CM_X_SB16); //disable sb16 compatible mode
snd_cmipci_write_8(card, CM_REG_MIXER1, snd_cmipci_read_8(card, CM_REG_MIXER1)&~(CM_FMMUTE|CM_WSMUTE)); //unmute FM/PCM
CMI8X38_sndcard_info.card_mixerchans = &cmi8x38_037_mixerset[0];
}
}

#endif

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