Version 25

Beta release as it hasn't been hardware tested. This release contains:

• Revise OTA mode entry instructions in README (fd377e5)
• Add bootload behavior details (2fcb62d)
  • Plan to migrate off custom TIM1 timer (3239e3c)
  • Phase 1 - Prepare and Baseline (f0e7fca)
  • Implement Phase 2 - Move Scheduler Logic to SysTick and Disable TIM1 (f5834a2)
  • Implement Phase 3 - Remove TIM1 from Scheduler (af70219)
  • Implement Phase 4 - Update Documentation and Spec (914627d)
• Merge pull request #2 from dacarson/FlashSaving-SysTick_Migration (9047beb)
  • Update Spec (86f5cc6)
  • Implement new HardFault spec (0484b29)
• Merge pull request #4 from dacarson/HardFault_Handling (9c5f123)
• Further FLASH size reductions (acc233d)
• Correct Measurement window description (eb2b679)
• Increment release number (b45a707)

Version-24

Version-24

Just one improvement, re-enable a software driven OTA path.

Version-23

Version 23

MCU reliability and diagnostics improvements:

• Watchdog (IWDG): Independent watchdog enabled (~8 s timeout). Refreshed once per main-loop iteration; never in ISRs. A hung main loop or I2C deadlock will cause a device reset so the unit can recover.
• HardFault safe state: On HardFault the MCU drives MT_EN and IP_EN low (RPi power off, charger path off), PWR_EN high, then resets. Ensures safe outputs before reset regardless of fault cause.
• Reset cause: Reset cause is captured at boot and persisted in flash. Exported via I2C Factory Testing: selector 0x08 = this boot’s raw reset flags (e.g. IWDG, POR, NRST); selector 0x09 = last persisted reset cause and sequence from flash. See Behavior Spec §4.4 and §10 for encoding.
• Flash persistence: Persistence record uses hardware CRC and structure version 2. Records with older version or invalid CRC are rejected at load (defaults applied). Old software-CRC records are no longer accepted.
• I2C robustness: Analog and digital input filters enabled (1 I2C clock digital filter) for noise immunity. Stuck-bus recovery remains software-based (e.g. SCL toggling); no hardware I2C timeout.

No change to the external I2C register contract or power/charger behavior beyond the above.

Version-22

UPSPlus Firmware — Version 22

Highlights

• Exposed INA219 current measurements via the 0x17 register set
• Improved power-up and power-down sequencing, including forced shutdown when state persistence fails
• Prevented low-power oscillation by blocking startup without a charger present
• Added smarter battery full/empty learning and improved capacity estimation
• Introduced dynamic battery full detection for more accurate state-of-charge

Factory Testing & Diagnostics

• Added factory testing and debug visibility for flash persistence
• Improved debugging scripts and test documentation

INA219 Current Measurement

• Implemented a full multi-phase INA219 architecture on a shared I²C bus:
  • Boot-time setup, runtime access window, snapshot integration
  • Fault handling, recovery, and validation

Other Improvements

• Improved documentation and added hardware reference docs

Version 21

• Added brownout support as document in the readme
• Corrected calibration mode
• Code cleanup, remove artifacts after the refactoring

Version 20

Version 20
This version is totally refactored firmware for the EP-0136 based on the Refactor Plan markdown document.

I have found this firmware to be rock solid in my testing, and it has the additional features that I sort after for a fully functional UPS.

As with most open source software, please use the firmware at your own risk.