API for low-level register manipulation

+ corresponding example

README.md

@@ -131,6 +131,7 @@ Where:
 * ```transmit_fsk_fixed``` - TX in FSK mode. Fixed packet length - 2047 bytes, NRZ encoding, CRC, AFC on.
 * ```transmit_ook``` - TX in OOK mode. Variable packet length, NRZ encoding, CRC, AFC on. Sending several messages: small 2 byte, messages that can fit into FIFO fully, max messages for variable packet type - 255 bytes and same messages, but for node address 0x11 and 0x00.
 * ```temperature``` - Constantly read raw temperature value from the internal sensor. Must be calibrated first using well-known temperature. Available in FSK mode.
+* ```low_level``` - Example for direct register manipulation.
 
 # Tests
 

examples/low_level/CMakeLists.txt

@@ -0,0 +1,6 @@
+cmake_minimum_required(VERSION 3.5)
+
+set(EXTRA_COMPONENT_DIRS "../../")
+include($ENV{IDF_PATH}/tools/cmake/project.cmake)
+project(sx127x_lowlevel)
+

examples/low_level/main/CMakeLists.txt

@@ -0,0 +1 @@
+idf_component_register(SRCS "main.c" INCLUDE_DIRS "")

examples/low_level/main/main.c

@@ -0,0 +1,55 @@
+#include <driver/spi_common.h>
+#include <driver/spi_master.h>
+#include <esp_log.h>
+#include <sx127x.h>
+#include <sx127x_registers.h>
+
+// TTGO lora32 v2.1 1.6.1
+#define SCK 5
+#define MISO 19
+#define MOSI 27
+#define SS 18
+#define RST 23
+#define DIO0 26
+// older versions of TTGO require manual wiring of pins below
+#define DIO1 33
+#define DIO2 32
+
+// Heltec lora32 v2
+// #define DIO1 35
+// #define DIO2 34
+
+static const char *TAG = "sx127x";
+
+sx127x device;
+
+void app_main() {
+  ESP_LOGI(TAG, "starting up");
+  spi_bus_config_t config = {
+      .mosi_io_num = MOSI,
+      .miso_io_num = MISO,
+      .sclk_io_num = SCK,
+      .quadwp_io_num = -1,
+      .quadhd_io_num = -1,
+      .max_transfer_sz = 0,
+  };
+  ESP_ERROR_CHECK(spi_bus_initialize(SPI2_HOST, &config, 1));
+  spi_device_interface_config_t dev_cfg = {
+      .clock_speed_hz = 4E6,
+      .spics_io_num = SS,
+      .queue_size = 16,
+      .command_bits = 0,
+      .address_bits = 8,
+      .dummy_bits = 0,
+      .mode = 0};
+  spi_device_handle_t spi_device;
+  ESP_ERROR_CHECK(spi_bus_add_device(SPI2_HOST, &dev_cfg, &spi_device));
+  ESP_ERROR_CHECK(sx127x_create(spi_device, &device));
+
+  uint8_t value = 0b01100111;
+  ESP_ERROR_CHECK(sx127x_write_register(REGINVERTIQ, value, &device.spi_device));
+  printf("written: %d\n", value);
+  uint8_t written = 0;
+  ESP_ERROR_CHECK(sx127x_read_register(REGINVERTIQ, &device.spi_device, &written));
+  printf("read: %d\n", written);
+}

include/sx127x.h

@@ -994,6 +994,28 @@ int sx127x_fsk_ook_set_temp_monitor(bool enable, sx127x *device);
  */
 int sx127x_fsk_ook_get_raw_temperature(sx127x *device, int8_t *raw_temperature);
 
+/**
+ * Low-level API to read single register. No validation is performed
+ * @param reg - the register id defined in sx127x_registers.h
+ * @param spi_device - wrapper around spi_device. Use device->spi_device.
+ * @param result - the result
+ * @return int
+ *         - SX127X_ERR_INVALID_ARG   on any SPI transfer errors
+ *         - SX127X_OK                on success
+ */
+int sx127x_read_register(int reg, shadow_spi_device_t *spi_device, uint8_t *result);
+
+/**
+ * Low-level API to write single register. No validation is performed
+ * @param reg - the register id defined in sx127x_registers.h
+ * @param value - value to write
+ * @param spi_device - wrapper around spi_device. Use device->spi_device.
+ * @return int
+ *         - SX127X_ERR_INVALID_ARG   on any SPI transfer errors
+ *         - SX127X_OK                on success
+ */
+int sx127x_write_register(int reg, uint8_t value, shadow_spi_device_t *spi_device);
+
 #ifdef __cplusplus
 }
 #endif

src/sx127x.c

@@ -167,6 +167,10 @@ int sx127x_shadow_spi_write_buffer(int reg, const uint8_t *buffer, size_t buffer
   return code;
 }
 
+int sx127x_write_register(int reg, uint8_t value, shadow_spi_device_t *spi_device) {
+  return sx127x_shadow_spi_write_register(reg, &value, 1, spi_device);
+}
+
 int sx127x_read_register(int reg, shadow_spi_device_t *spi_device, uint8_t *result) {
 #ifdef CONFIG_SX127X_DISABLE_SPI_CACHE
   uint32_t value;