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EKV3 Verilog-A model

In this repository, you will find the Verilog-A code of EKV3 MOSFET model.
This code is developed and maintained by EKV3 modeling group at Technical University of Crete (TUC).

Your feedback is most welcome. Please direct inquiries, comments etc. to,

Prof. Matthias Bucher
Technical University of Crete (TUC)
73100 Chania, Crete, Greece
phone: + 30 28210 37210
fax: + 30 28210 37542
mbucher@tuc.gr

Current contributors: Matthias Bucher, Nikolaos Makris
Past contributors: Antonios Bazigos, Marianna Chalkiadaki, Nikolaos Mavredakis, Francois Krummenacher, Jean-Michel Sallese, Christian Enz, Ananda Roy

This fork has modifications to improve compatibility to Verilog-A standard and simulators ngspice and Xyce. Changelog

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