-
Notifications
You must be signed in to change notification settings - Fork 0
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Use a variable impedance for the voltage dip and voltage surge test cases #19
Comments
We recall that we already discussed this issue some time ago:
Now, in order to implement the change in Fiche I16 examples, we see the following:
We think we need to mull over it a bit more before we give a definte answer. |
From our discussion: For tests of type I6/I7
The next upcoming versions of Fiche I16, Fiche I6 & Fiche7 will change the way these tests I6/I7 are specified, in this manner. For tests of voltage swell/dip in Zone-1 of RMS Model Validation (+-10% step change)
|
As discussed in our Tech Meeting today (Feb 21), we should indeed consider this improvement in our short-term roadmap:
For the voltage swell/dip tests of Zone-1, we still need more feedback from RTE. |
Right now, the tool is using a variable voltage infinite bus to create controlled voltage surge and voltage dip in the related test cases.

In the DTR, we ask producers to use a variable impedance to do it following this picture :
We recently added a variable impedance in the dynawo library to be able to reproduce this simulation. Would it be possible to be able to use this configuration in the tool too ? (For performance verification as well as for model validation)
The text was updated successfully, but these errors were encountered: