lib/x86/adler32: add an AVX-512 implementation #342
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ebiggers
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Feb 21, 2024
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ebiggers
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- ci.yml: ensure MSVC can find zlib
- lib/x86: disambiguate 512-bit vector from AVX-512F
- lib/x86: fix XCR0 check for AVX-512VL
- lib/x86/adler32: add an AVX-512 implementation
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crc32_x86_vpclmulqdq_avx512vl and crc32_x86_vpclmulqdq_avx512f_avx512vl actually use the same CPU features, considering that vpternlog always requires at least avx512f, and compilers consider avx512vl to imply avx512f. Rename them to *_avx512_vl256 and *_avx512_vl512 to reflect that they differ only in vector length, and fix the CPU feature checking to use a separate flag for whether 512-bit vectors are enabled.
According to the Intel manual, the ZMM_Hi256 bit needs to be checked for all AVX-512 instructions, even if 512-bit vectors aren't being used.
libdeflate used to (before commit 416bac3) have an AVX512BW implementation of Adler-32, but I removed it due to AVX-512's downclocking issues. Since then, newer Intel and AMD CPUs have come out with better AVX-512 implementations, and these CPUs tend to have AVX512VNNI which includes a dot product instruction which is useful for Adler-32. Therefore, add an AVX512VNNI/AVX512BW implementation.
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