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Update stm32-metapac.
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‎embassy-stm32/Cargo.toml

Lines changed: 67 additions & 64 deletions
Original file line numberDiff line numberDiff line change
@@ -73,7 +73,7 @@ rand_core = "0.6.3"
7373
sdio-host = "0.5.0"
7474
critical-section = "1.1"
7575
#stm32-metapac = { version = "15" }
76-
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-274eeb0ed4477768d026276c4e9873586c1b9a05" }
76+
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-fad4bc0f2baac29ecebb5153d2997b649b71025f" }
7777

7878
vcell = "0.1.3"
7979
nb = "1.0.0"
@@ -102,7 +102,7 @@ proc-macro2 = "1.0.36"
102102
quote = "1.0.15"
103103

104104
#stm32-metapac = { version = "15", default-features = false, features = ["metadata"]}
105-
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-274eeb0ed4477768d026276c4e9873586c1b9a05", default-features = false, features = ["metadata"] }
105+
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-fad4bc0f2baac29ecebb5153d2997b649b71025f", default-features = false, features = ["metadata"] }
106106

107107
[features]
108108
default = ["rt"]
@@ -127,8 +127,8 @@ exti = []
127127
low-power = [ "dep:embassy-executor", "embassy-executor?/arch-cortex-m", "time" ]
128128
low-power-debug-with-sleep = []
129129

130-
## Automatically generate `memory.x` file using [`stm32-metapac`](https://docs.rs/stm32-metapac/)
131-
memory-x = ["stm32-metapac/memory-x"]
130+
## Automatically generate `memory.x` file based on the memory map from [`stm32-metapac`](https://docs.rs/stm32-metapac/)
131+
memory-x = []
132132

133133
## Use secure registers when TrustZone is enabled
134134
trustzone-secure = []
@@ -202,6 +202,9 @@ _split-pins-enabled = []
202202

203203
## internal use only
204204
_dual-core = []
205+
_core-cm0p = []
206+
_core-cm4 = []
207+
_core-cm7 = []
205208

206209
#! ## Chip-selection features
207210
#! Select your chip by specifying the model as a feature, e.g. `stm32c011d6`.
@@ -1026,40 +1029,40 @@ stm32h743xg = [ "stm32-metapac/stm32h743xg" ]
10261029
stm32h743xi = [ "stm32-metapac/stm32h743xi" ]
10271030
stm32h743zg = [ "stm32-metapac/stm32h743zg" ]
10281031
stm32h743zi = [ "stm32-metapac/stm32h743zi" ]
1029-
stm32h745bg-cm7 = [ "stm32-metapac/stm32h745bg-cm7", "_dual-core" ]
1030-
stm32h745bg-cm4 = [ "stm32-metapac/stm32h745bg-cm4", "_dual-core" ]
1031-
stm32h745bi-cm7 = [ "stm32-metapac/stm32h745bi-cm7", "_dual-core" ]
1032-
stm32h745bi-cm4 = [ "stm32-metapac/stm32h745bi-cm4", "_dual-core" ]
1033-
stm32h745ig-cm7 = [ "stm32-metapac/stm32h745ig-cm7", "_dual-core" ]
1034-
stm32h745ig-cm4 = [ "stm32-metapac/stm32h745ig-cm4", "_dual-core" ]
1035-
stm32h745ii-cm7 = [ "stm32-metapac/stm32h745ii-cm7", "_dual-core" ]
1036-
stm32h745ii-cm4 = [ "stm32-metapac/stm32h745ii-cm4", "_dual-core" ]
1037-
stm32h745xg-cm7 = [ "stm32-metapac/stm32h745xg-cm7", "_dual-core" ]
1038-
stm32h745xg-cm4 = [ "stm32-metapac/stm32h745xg-cm4", "_dual-core" ]
1039-
stm32h745xi-cm7 = [ "stm32-metapac/stm32h745xi-cm7", "_dual-core" ]
1040-
stm32h745xi-cm4 = [ "stm32-metapac/stm32h745xi-cm4", "_dual-core" ]
1041-
stm32h745zg-cm7 = [ "stm32-metapac/stm32h745zg-cm7", "_dual-core" ]
1042-
stm32h745zg-cm4 = [ "stm32-metapac/stm32h745zg-cm4", "_dual-core" ]
1043-
stm32h745zi-cm7 = [ "stm32-metapac/stm32h745zi-cm7", "_dual-core" ]
1044-
stm32h745zi-cm4 = [ "stm32-metapac/stm32h745zi-cm4", "_dual-core" ]
1045-
stm32h747ag-cm7 = [ "stm32-metapac/stm32h747ag-cm7", "_dual-core" ]
1046-
stm32h747ag-cm4 = [ "stm32-metapac/stm32h747ag-cm4", "_dual-core" ]
1047-
stm32h747ai-cm7 = [ "stm32-metapac/stm32h747ai-cm7", "_dual-core" ]
1048-
stm32h747ai-cm4 = [ "stm32-metapac/stm32h747ai-cm4", "_dual-core" ]
1049-
stm32h747bg-cm7 = [ "stm32-metapac/stm32h747bg-cm7", "_dual-core" ]
1050-
stm32h747bg-cm4 = [ "stm32-metapac/stm32h747bg-cm4", "_dual-core" ]
1051-
stm32h747bi-cm7 = [ "stm32-metapac/stm32h747bi-cm7", "_dual-core" ]
1052-
stm32h747bi-cm4 = [ "stm32-metapac/stm32h747bi-cm4", "_dual-core" ]
1053-
stm32h747ig-cm7 = [ "stm32-metapac/stm32h747ig-cm7", "_dual-core" ]
1054-
stm32h747ig-cm4 = [ "stm32-metapac/stm32h747ig-cm4", "_dual-core" ]
1055-
stm32h747ii-cm7 = [ "stm32-metapac/stm32h747ii-cm7", "_dual-core" ]
1056-
stm32h747ii-cm4 = [ "stm32-metapac/stm32h747ii-cm4", "_dual-core" ]
1057-
stm32h747xg-cm7 = [ "stm32-metapac/stm32h747xg-cm7", "_dual-core" ]
1058-
stm32h747xg-cm4 = [ "stm32-metapac/stm32h747xg-cm4", "_dual-core" ]
1059-
stm32h747xi-cm7 = [ "stm32-metapac/stm32h747xi-cm7", "_dual-core" ]
1060-
stm32h747xi-cm4 = [ "stm32-metapac/stm32h747xi-cm4", "_dual-core" ]
1061-
stm32h747zi-cm7 = [ "stm32-metapac/stm32h747zi-cm7", "_dual-core" ]
1062-
stm32h747zi-cm4 = [ "stm32-metapac/stm32h747zi-cm4", "_dual-core" ]
1032+
stm32h745bg-cm7 = [ "stm32-metapac/stm32h745bg-cm7", "_dual-core", "_core-cm7" ]
1033+
stm32h745bg-cm4 = [ "stm32-metapac/stm32h745bg-cm4", "_dual-core", "_core-cm4" ]
1034+
stm32h745bi-cm7 = [ "stm32-metapac/stm32h745bi-cm7", "_dual-core", "_core-cm7" ]
1035+
stm32h745bi-cm4 = [ "stm32-metapac/stm32h745bi-cm4", "_dual-core", "_core-cm4" ]
1036+
stm32h745ig-cm7 = [ "stm32-metapac/stm32h745ig-cm7", "_dual-core", "_core-cm7" ]
1037+
stm32h745ig-cm4 = [ "stm32-metapac/stm32h745ig-cm4", "_dual-core", "_core-cm4" ]
1038+
stm32h745ii-cm7 = [ "stm32-metapac/stm32h745ii-cm7", "_dual-core", "_core-cm7" ]
1039+
stm32h745ii-cm4 = [ "stm32-metapac/stm32h745ii-cm4", "_dual-core", "_core-cm4" ]
1040+
stm32h745xg-cm7 = [ "stm32-metapac/stm32h745xg-cm7", "_dual-core", "_core-cm7" ]
1041+
stm32h745xg-cm4 = [ "stm32-metapac/stm32h745xg-cm4", "_dual-core", "_core-cm4" ]
1042+
stm32h745xi-cm7 = [ "stm32-metapac/stm32h745xi-cm7", "_dual-core", "_core-cm7" ]
1043+
stm32h745xi-cm4 = [ "stm32-metapac/stm32h745xi-cm4", "_dual-core", "_core-cm4" ]
1044+
stm32h745zg-cm7 = [ "stm32-metapac/stm32h745zg-cm7", "_dual-core", "_core-cm7" ]
1045+
stm32h745zg-cm4 = [ "stm32-metapac/stm32h745zg-cm4", "_dual-core", "_core-cm4" ]
1046+
stm32h745zi-cm7 = [ "stm32-metapac/stm32h745zi-cm7", "_dual-core", "_core-cm7" ]
1047+
stm32h745zi-cm4 = [ "stm32-metapac/stm32h745zi-cm4", "_dual-core", "_core-cm4" ]
1048+
stm32h747ag-cm7 = [ "stm32-metapac/stm32h747ag-cm7", "_dual-core", "_core-cm7" ]
1049+
stm32h747ag-cm4 = [ "stm32-metapac/stm32h747ag-cm4", "_dual-core", "_core-cm4" ]
1050+
stm32h747ai-cm7 = [ "stm32-metapac/stm32h747ai-cm7", "_dual-core", "_core-cm7" ]
1051+
stm32h747ai-cm4 = [ "stm32-metapac/stm32h747ai-cm4", "_dual-core", "_core-cm4" ]
1052+
stm32h747bg-cm7 = [ "stm32-metapac/stm32h747bg-cm7", "_dual-core", "_core-cm7" ]
1053+
stm32h747bg-cm4 = [ "stm32-metapac/stm32h747bg-cm4", "_dual-core", "_core-cm4" ]
1054+
stm32h747bi-cm7 = [ "stm32-metapac/stm32h747bi-cm7", "_dual-core", "_core-cm7" ]
1055+
stm32h747bi-cm4 = [ "stm32-metapac/stm32h747bi-cm4", "_dual-core", "_core-cm4" ]
1056+
stm32h747ig-cm7 = [ "stm32-metapac/stm32h747ig-cm7", "_dual-core", "_core-cm7" ]
1057+
stm32h747ig-cm4 = [ "stm32-metapac/stm32h747ig-cm4", "_dual-core", "_core-cm4" ]
1058+
stm32h747ii-cm7 = [ "stm32-metapac/stm32h747ii-cm7", "_dual-core", "_core-cm7" ]
1059+
stm32h747ii-cm4 = [ "stm32-metapac/stm32h747ii-cm4", "_dual-core", "_core-cm4" ]
1060+
stm32h747xg-cm7 = [ "stm32-metapac/stm32h747xg-cm7", "_dual-core", "_core-cm7" ]
1061+
stm32h747xg-cm4 = [ "stm32-metapac/stm32h747xg-cm4", "_dual-core", "_core-cm4" ]
1062+
stm32h747xi-cm7 = [ "stm32-metapac/stm32h747xi-cm7", "_dual-core", "_core-cm7" ]
1063+
stm32h747xi-cm4 = [ "stm32-metapac/stm32h747xi-cm4", "_dual-core", "_core-cm4" ]
1064+
stm32h747zi-cm7 = [ "stm32-metapac/stm32h747zi-cm7", "_dual-core", "_core-cm7" ]
1065+
stm32h747zi-cm4 = [ "stm32-metapac/stm32h747zi-cm4", "_dual-core", "_core-cm4" ]
10631066
stm32h750ib = [ "stm32-metapac/stm32h750ib" ]
10641067
stm32h750vb = [ "stm32-metapac/stm32h750vb" ]
10651068
stm32h750xb = [ "stm32-metapac/stm32h750xb" ]
@@ -1070,24 +1073,24 @@ stm32h753ii = [ "stm32-metapac/stm32h753ii" ]
10701073
stm32h753vi = [ "stm32-metapac/stm32h753vi" ]
10711074
stm32h753xi = [ "stm32-metapac/stm32h753xi" ]
10721075
stm32h753zi = [ "stm32-metapac/stm32h753zi" ]
1073-
stm32h755bi-cm7 = [ "stm32-metapac/stm32h755bi-cm7", "_dual-core" ]
1074-
stm32h755bi-cm4 = [ "stm32-metapac/stm32h755bi-cm4", "_dual-core" ]
1075-
stm32h755ii-cm7 = [ "stm32-metapac/stm32h755ii-cm7", "_dual-core" ]
1076-
stm32h755ii-cm4 = [ "stm32-metapac/stm32h755ii-cm4", "_dual-core" ]
1077-
stm32h755xi-cm7 = [ "stm32-metapac/stm32h755xi-cm7", "_dual-core" ]
1078-
stm32h755xi-cm4 = [ "stm32-metapac/stm32h755xi-cm4", "_dual-core" ]
1079-
stm32h755zi-cm7 = [ "stm32-metapac/stm32h755zi-cm7", "_dual-core" ]
1080-
stm32h755zi-cm4 = [ "stm32-metapac/stm32h755zi-cm4", "_dual-core" ]
1081-
stm32h757ai-cm7 = [ "stm32-metapac/stm32h757ai-cm7", "_dual-core" ]
1082-
stm32h757ai-cm4 = [ "stm32-metapac/stm32h757ai-cm4", "_dual-core" ]
1083-
stm32h757bi-cm7 = [ "stm32-metapac/stm32h757bi-cm7", "_dual-core" ]
1084-
stm32h757bi-cm4 = [ "stm32-metapac/stm32h757bi-cm4", "_dual-core" ]
1085-
stm32h757ii-cm7 = [ "stm32-metapac/stm32h757ii-cm7", "_dual-core" ]
1086-
stm32h757ii-cm4 = [ "stm32-metapac/stm32h757ii-cm4", "_dual-core" ]
1087-
stm32h757xi-cm7 = [ "stm32-metapac/stm32h757xi-cm7", "_dual-core" ]
1088-
stm32h757xi-cm4 = [ "stm32-metapac/stm32h757xi-cm4", "_dual-core" ]
1089-
stm32h757zi-cm7 = [ "stm32-metapac/stm32h757zi-cm7", "_dual-core" ]
1090-
stm32h757zi-cm4 = [ "stm32-metapac/stm32h757zi-cm4", "_dual-core" ]
1076+
stm32h755bi-cm7 = [ "stm32-metapac/stm32h755bi-cm7", "_dual-core", "_core-cm7" ]
1077+
stm32h755bi-cm4 = [ "stm32-metapac/stm32h755bi-cm4", "_dual-core", "_core-cm4" ]
1078+
stm32h755ii-cm7 = [ "stm32-metapac/stm32h755ii-cm7", "_dual-core", "_core-cm7" ]
1079+
stm32h755ii-cm4 = [ "stm32-metapac/stm32h755ii-cm4", "_dual-core", "_core-cm4" ]
1080+
stm32h755xi-cm7 = [ "stm32-metapac/stm32h755xi-cm7", "_dual-core", "_core-cm7" ]
1081+
stm32h755xi-cm4 = [ "stm32-metapac/stm32h755xi-cm4", "_dual-core", "_core-cm4" ]
1082+
stm32h755zi-cm7 = [ "stm32-metapac/stm32h755zi-cm7", "_dual-core", "_core-cm7" ]
1083+
stm32h755zi-cm4 = [ "stm32-metapac/stm32h755zi-cm4", "_dual-core", "_core-cm4" ]
1084+
stm32h757ai-cm7 = [ "stm32-metapac/stm32h757ai-cm7", "_dual-core", "_core-cm7" ]
1085+
stm32h757ai-cm4 = [ "stm32-metapac/stm32h757ai-cm4", "_dual-core", "_core-cm4" ]
1086+
stm32h757bi-cm7 = [ "stm32-metapac/stm32h757bi-cm7", "_dual-core", "_core-cm7" ]
1087+
stm32h757bi-cm4 = [ "stm32-metapac/stm32h757bi-cm4", "_dual-core", "_core-cm4" ]
1088+
stm32h757ii-cm7 = [ "stm32-metapac/stm32h757ii-cm7", "_dual-core", "_core-cm7" ]
1089+
stm32h757ii-cm4 = [ "stm32-metapac/stm32h757ii-cm4", "_dual-core", "_core-cm4" ]
1090+
stm32h757xi-cm7 = [ "stm32-metapac/stm32h757xi-cm7", "_dual-core", "_core-cm7" ]
1091+
stm32h757xi-cm4 = [ "stm32-metapac/stm32h757xi-cm4", "_dual-core", "_core-cm4" ]
1092+
stm32h757zi-cm7 = [ "stm32-metapac/stm32h757zi-cm7", "_dual-core", "_core-cm7" ]
1093+
stm32h757zi-cm4 = [ "stm32-metapac/stm32h757zi-cm4", "_dual-core", "_core-cm4" ]
10911094
stm32h7a3ag = [ "stm32-metapac/stm32h7a3ag" ]
10921095
stm32h7a3ai = [ "stm32-metapac/stm32h7a3ai" ]
10931096
stm32h7a3ig = [ "stm32-metapac/stm32h7a3ig" ]
@@ -1620,14 +1623,14 @@ stm32wba55he = [ "stm32-metapac/stm32wba55he" ]
16201623
stm32wba55hg = [ "stm32-metapac/stm32wba55hg" ]
16211624
stm32wba55ue = [ "stm32-metapac/stm32wba55ue" ]
16221625
stm32wba55ug = [ "stm32-metapac/stm32wba55ug" ]
1623-
stm32wl54cc-cm4 = [ "stm32-metapac/stm32wl54cc-cm4", "_dual-core" ]
1624-
stm32wl54cc-cm0p = [ "stm32-metapac/stm32wl54cc-cm0p", "_dual-core" ]
1625-
stm32wl54jc-cm4 = [ "stm32-metapac/stm32wl54jc-cm4", "_dual-core" ]
1626-
stm32wl54jc-cm0p = [ "stm32-metapac/stm32wl54jc-cm0p", "_dual-core" ]
1627-
stm32wl55cc-cm4 = [ "stm32-metapac/stm32wl55cc-cm4", "_dual-core" ]
1628-
stm32wl55cc-cm0p = [ "stm32-metapac/stm32wl55cc-cm0p", "_dual-core" ]
1629-
stm32wl55jc-cm4 = [ "stm32-metapac/stm32wl55jc-cm4", "_dual-core" ]
1630-
stm32wl55jc-cm0p = [ "stm32-metapac/stm32wl55jc-cm0p", "_dual-core" ]
1626+
stm32wl54cc-cm4 = [ "stm32-metapac/stm32wl54cc-cm4", "_dual-core", "_core-cm4" ]
1627+
stm32wl54cc-cm0p = [ "stm32-metapac/stm32wl54cc-cm0p", "_dual-core", "_core-cm0p" ]
1628+
stm32wl54jc-cm4 = [ "stm32-metapac/stm32wl54jc-cm4", "_dual-core", "_core-cm4" ]
1629+
stm32wl54jc-cm0p = [ "stm32-metapac/stm32wl54jc-cm0p", "_dual-core", "_core-cm0p" ]
1630+
stm32wl55cc-cm4 = [ "stm32-metapac/stm32wl55cc-cm4", "_dual-core", "_core-cm4" ]
1631+
stm32wl55cc-cm0p = [ "stm32-metapac/stm32wl55cc-cm0p", "_dual-core", "_core-cm0p" ]
1632+
stm32wl55jc-cm4 = [ "stm32-metapac/stm32wl55jc-cm4", "_dual-core", "_core-cm4" ]
1633+
stm32wl55jc-cm0p = [ "stm32-metapac/stm32wl55jc-cm0p", "_dual-core", "_core-cm0p" ]
16311634
stm32wle4c8 = [ "stm32-metapac/stm32wle4c8" ]
16321635
stm32wle4cb = [ "stm32-metapac/stm32wle4cb" ]
16331636
stm32wle4cc = [ "stm32-metapac/stm32wle4cc" ]

‎embassy-stm32/build.rs

Lines changed: 135 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,8 +9,8 @@ use proc_macro2::{Ident, TokenStream};
99
use quote::{format_ident, quote};
1010
use stm32_metapac::metadata::ir::BitOffset;
1111
use stm32_metapac::metadata::{
12-
MemoryRegionKind, PeripheralRccKernelClock, PeripheralRccRegister, PeripheralRegisters, StopMode, ALL_CHIPS,
13-
ALL_PERIPHERAL_VERSIONS, METADATA,
12+
MemoryRegion, MemoryRegionKind, PeripheralRccKernelClock, PeripheralRccRegister, PeripheralRegisters, StopMode,
13+
ALL_CHIPS, ALL_PERIPHERAL_VERSIONS, METADATA,
1414
};
1515

1616
#[path = "./build_common.rs"]
@@ -1678,6 +1678,59 @@ fn main() {
16781678
pub(crate) const DMA_CHANNELS: &[crate::dma::ChannelInfo] = &[#dmas];
16791679
});
16801680

1681+
// ========
1682+
// Generate gpio_block() function
1683+
1684+
let gpio_base = METADATA.peripherals.iter().find(|p| p.name == "GPIOA").unwrap().address as usize;
1685+
let gpio_stride = 0x400 as usize;
1686+
1687+
for p in METADATA.peripherals {
1688+
if let Some(bi) = &p.registers {
1689+
if bi.kind == "gpio" {
1690+
assert_eq!(0, (p.address as usize - gpio_base) % gpio_stride);
1691+
}
1692+
}
1693+
}
1694+
1695+
g.extend(quote!(
1696+
pub fn gpio_block(n: usize) -> crate::pac::gpio::Gpio {{
1697+
unsafe {{ crate::pac::gpio::Gpio::from_ptr((#gpio_base + #gpio_stride*n) as _) }}
1698+
}}
1699+
));
1700+
1701+
// ========
1702+
// Generate flash constants
1703+
1704+
let flash_regions: Vec<&MemoryRegion> = METADATA
1705+
.memory
1706+
.iter()
1707+
.filter(|x| x.kind == MemoryRegionKind::Flash && x.name.starts_with("BANK_"))
1708+
.collect();
1709+
let first_flash = flash_regions.first().unwrap();
1710+
let total_flash_size = flash_regions
1711+
.iter()
1712+
.map(|x| x.size)
1713+
.reduce(|acc, item| acc + item)
1714+
.unwrap();
1715+
let write_sizes: HashSet<_> = flash_regions
1716+
.iter()
1717+
.map(|r| r.settings.as_ref().unwrap().write_size)
1718+
.collect();
1719+
assert_eq!(1, write_sizes.len());
1720+
1721+
let flash_base = first_flash.address as usize;
1722+
let total_flash_size = total_flash_size as usize;
1723+
let write_size = (*write_sizes.iter().next().unwrap()) as usize;
1724+
1725+
g.extend(quote!(
1726+
pub const FLASH_BASE: usize = #flash_base;
1727+
pub const FLASH_SIZE: usize = #total_flash_size;
1728+
pub const WRITE_SIZE: usize = #write_size;
1729+
));
1730+
1731+
// ========
1732+
// Generate macro-tables
1733+
16811734
for irq in METADATA.interrupts {
16821735
let name = irq.name.to_ascii_uppercase();
16831736
interrupts_table.push(vec![name.clone()]);
@@ -1772,6 +1825,11 @@ fn main() {
17721825
}
17731826

17741827
println!("cargo:rerun-if-changed=build.rs");
1828+
1829+
if cfg!(feature = "memory-x") {
1830+
gen_memory_x(out_dir);
1831+
println!("cargo:rustc-link-search={}", out_dir.display());
1832+
}
17751833
}
17761834

17771835
enum GetOneError {
@@ -1857,3 +1915,78 @@ fn rustfmt(path: impl AsRef<Path>) {
18571915
}
18581916
}
18591917
}
1918+
1919+
fn gen_memory_x(out_dir: &Path) {
1920+
let mut memory_x = String::new();
1921+
1922+
let flash = get_memory_range(MemoryRegionKind::Flash);
1923+
let ram = get_memory_range(MemoryRegionKind::Ram);
1924+
1925+
write!(memory_x, "MEMORY\n{{\n").unwrap();
1926+
writeln!(
1927+
memory_x,
1928+
" FLASH : ORIGIN = 0x{:08x}, LENGTH = {:>4}K /* {} */",
1929+
flash.0,
1930+
flash.1 / 1024,
1931+
flash.2
1932+
)
1933+
.unwrap();
1934+
writeln!(
1935+
memory_x,
1936+
" RAM : ORIGIN = 0x{:08x}, LENGTH = {:>4}K /* {} */",
1937+
ram.0,
1938+
ram.1 / 1024,
1939+
ram.2
1940+
)
1941+
.unwrap();
1942+
write!(memory_x, "}}").unwrap();
1943+
1944+
std::fs::write(out_dir.join("memory.x"), memory_x.as_bytes()).unwrap();
1945+
}
1946+
1947+
fn get_memory_range(kind: MemoryRegionKind) -> (u32, u32, String) {
1948+
let mut mems: Vec<_> = METADATA
1949+
.memory
1950+
.iter()
1951+
.filter(|m| m.kind == kind && m.size != 0)
1952+
.collect();
1953+
mems.sort_by_key(|m| m.address);
1954+
1955+
let mut start = u32::MAX;
1956+
let mut end = u32::MAX;
1957+
let mut names = Vec::new();
1958+
let mut best: Option<(u32, u32, String)> = None;
1959+
for m in mems {
1960+
if !mem_filter(&METADATA.name, &m.name) {
1961+
continue;
1962+
}
1963+
1964+
if m.address != end {
1965+
names = Vec::new();
1966+
start = m.address;
1967+
end = m.address;
1968+
}
1969+
1970+
end += m.size;
1971+
names.push(m.name.to_string());
1972+
1973+
if best.is_none() || end - start > best.as_ref().unwrap().1 {
1974+
best = Some((start, end - start, names.join(" + ")));
1975+
}
1976+
}
1977+
1978+
best.unwrap()
1979+
}
1980+
1981+
fn mem_filter(chip: &str, region: &str) -> bool {
1982+
// in STM32WB, SRAM2a/SRAM2b are reserved for the radio core.
1983+
if chip.starts_with("STM32WB")
1984+
&& !chip.starts_with("STM32WBA")
1985+
&& !chip.starts_with("STM32WB0")
1986+
&& region.starts_with("SRAM2")
1987+
{
1988+
return false;
1989+
}
1990+
1991+
true
1992+
}

‎embassy-stm32/src/exti.rs

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -16,9 +16,14 @@ use crate::{interrupt, pac, peripherals, Peripheral};
1616
const EXTI_COUNT: usize = 16;
1717
static EXTI_WAKERS: [AtomicWaker; EXTI_COUNT] = [const { AtomicWaker::new() }; EXTI_COUNT];
1818

19-
#[cfg(exti_w)]
19+
#[cfg(all(exti_w, feature = "_core-cm0p"))]
2020
fn cpu_regs() -> pac::exti::Cpu {
21-
EXTI.cpu(crate::pac::CORE_INDEX)
21+
EXTI.cpu(1)
22+
}
23+
24+
#[cfg(all(exti_w, not(feature = "_core-cm0p")))]
25+
fn cpu_regs() -> pac::exti::Cpu {
26+
EXTI.cpu(0)
2227
}
2328

2429
#[cfg(not(exti_w))]

‎embassy-stm32/src/flash/common.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,12 +3,12 @@ use core::sync::atomic::{fence, Ordering};
33

44
use embassy_hal_internal::drop::OnDrop;
55
use embassy_hal_internal::{into_ref, PeripheralRef};
6-
use stm32_metapac::FLASH_BASE;
76

87
use super::{
98
family, Async, Blocking, Error, FlashBank, FlashLayout, FlashRegion, FlashSector, FLASH_SIZE, MAX_ERASE_SIZE,
109
READ_SIZE, WRITE_SIZE,
1110
};
11+
use crate::_generated::FLASH_BASE;
1212
use crate::peripherals::FLASH;
1313
use crate::Peripheral;
1414

‎embassy-stm32/src/flash/f4.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,9 +3,9 @@ use core::sync::atomic::{fence, AtomicBool, Ordering};
33

44
use embassy_sync::waitqueue::AtomicWaker;
55
use pac::flash::regs::Sr;
6-
use pac::FLASH_SIZE;
76

87
use super::{FlashBank, FlashRegion, FlashSector, FLASH_REGIONS, WRITE_SIZE};
8+
use crate::_generated::FLASH_SIZE;
99
use crate::flash::Error;
1010
use crate::pac;
1111
#[allow(missing_docs)] // TODO
@@ -14,9 +14,9 @@ mod alt_regions {
1414
use core::marker::PhantomData;
1515

1616
use embassy_hal_internal::PeripheralRef;
17-
use stm32_metapac::FLASH_SIZE;
1817

1918
use crate::_generated::flash_regions::{BANK1_REGION1, BANK1_REGION2, BANK1_REGION3};
19+
use crate::_generated::FLASH_SIZE;
2020
use crate::flash::{asynch, Async, Bank1Region1, Bank1Region2, Blocking, Error, Flash, FlashBank, FlashRegion};
2121
use crate::peripherals::FLASH;
2222

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