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Merge branch 'fix/esp32c5_rng_random_disable_v5.3' into 'release/v5.3'
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fix(bootloader): update random disable api for ESP32-C5/C6 (v5.3)

See merge request espressif/esp-idf!32761
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jack0c committed Aug 19, 2024
2 parents 1f37d12 + 3eec62f commit 0526c35
Showing 1 changed file with 0 additions and 3 deletions.
3 changes: 0 additions & 3 deletions components/bootloader_support/src/bootloader_random_esp32c6.c
Original file line number Diff line number Diff line change
Expand Up @@ -88,9 +88,6 @@ void bootloader_random_disable(void)
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC1_ENCAL_REF_ADDR, 0);
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC2_ENCAL_REF_ADDR, 0);

// Revert PMU_RF_PWC_REG to it's initial value
CLEAR_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);

// disable ADC_CTRL_CLK (SAR ADC function clock)
REG_WRITE(PCR_SARADC_CLKM_CONF_REG, 0x00404000);

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