build(deps): bump third_party/litex from 95b310e
to baff4c6
#3885
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Bumps third_party/litex from
95b310e
tobaff4c6
.Commits
baff4c6
Merge pull request #2075 from trabucayre/efinix_clkinput_signal033ec13
Merge pull request #2076 from trabucayre/xc7s_jtag6e9dffd
soc/core/hyperbus: Avoid combinatorial loop on write bursts (Reported when bu...ad2c3fc
soc/cores/cpu/vexiirscv: Add standard variant to allow compilation without sp...f1e1f35
build/efinix/ifacewriter.py: allows the use of ClockSignal for IN_CLK_PIN (gpio)aca959b
build/efinix/common.py: ClkInput: added ClockSignal supporte072156
build/xilinx/platform.py: added xc7s to the list of device supporting jtag ac...fc68f03
soc/cores/jtag.py: added Spartan7 definition for BSCANE29bacbe1
Merge pull request #1974 from motec-research/dts_zephyr_updatesa350d2e
soc/interconnect/stream: Add optional CSR to Multiplexer/Demultiplexer and Cr...Dependabot will resolve any conflicts with this PR as long as you don't alter it yourself. You can also trigger a rebase manually by commenting
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