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Resources

• Getting started Guide
• Documentation
• Supported boards
• Configuration

Publications

• D. Sidler, G. Alonso, M. Blott, K. Karras et al., Scalable 10Gbps TCP/IP Stack Architecture for Reconfigurable Hardware, in FCCM’15, Paper, Slides

• D. Sidler, Z. Istvan, G. Alonso, Low-Latency TCP/IP Stack for Data Center Applications, in FPL'16, Paper, [Slides]

Used by

These are all the publications/projects we are aware of using the TCP/IP stack

• Z. Istvan, D. Sidler, G. Alonso, Caribou: Intelligent Distributed Storage, in VLDB'17, Paper
• F. Abel, J. Weerasinghe, C. Hagleitner, B. Weiss, S Paredes, An FPGA Platform for Hyperscalers, in Hot Interconnects'17
• Z. Istvan, D. Sidler, G. Alonso, Consensus in a Box: Inexpensive Coordination in Hardware, in NSDI'16, Paper
• J. Weerasinghe, F. Abel, C. Hagleitner, A. Herkersdorf, Disaggregated FPGAs: Network performance comparison against bare-metal servers, virtual machines and Linux containers, in CloudCom'16
• J. Weerasinghe, R. Polig, F. Abel, C. Hagleitner, Network-Attached FPGAs for Data Center Applications, in FPT'16
• Z. Istvan, D. Sidler, G. Alonso, Building a distributed key-value store with FPGA-based microservers, in FPL'15

If you are using the TCP/IP stack for your project, we would be happy to add you to this list.

Contributors

• David Sidler, [Systems Group] (http://systems.ethz.ch), ETH Zurich
• [Kimon Karras] (http://github.com/kimonk), former Researcher at Xilinx Research, Dublin
• Lisa Liu, Xilinx Research, Dublin
• Your name could be here..

Support

For questions please contact david.sidler@inf.ethz.ch.

License

The source for this project is licensed under the 3-Clause BSD License.

Acknowledgment

The original version of this TCP/IP stack was developed in collaboration with Xilinx Research, Dublin, Ireland. This original version was open sourced at https://github.com/Xilinx/HLx_Examples/tree/master/Acceleration/tcp_ip