Machine.cpp

#include "Machine.h"
#include "Constants.h"
#include <iostream> 




Machine::Machine(DRAM& memRef)
    : PC(0), R(), bus(memRef)
{

    R.setSP(STACK_BOTTOM);

}





uint32_t Machine::stackPop()
{
    uint32_t sp = R.readFromRegister(SP_REG);
    uint32_t value = bus.loadFromMem(sp, WORD_SIZE_BITS);
    R.writeToRegister(SP_REG, sp + WORD_SIZE_BYTES);
    return value;
}

void Machine::stackPush(uint32_t value)
{
    uint32_t sp = R.readFromRegister(SP_REG);
    sp -= WORD_SIZE_BYTES;
    bus.storeInMem(sp, WORD_SIZE_BITS, value);
    R.writeToRegister(SP_REG, sp);
}

uint32_t Machine::getPC() const
{
    return PC;
}

void Machine::loadProgram(const std::string& filename)
{
    uint32_t entry_point = elf.loadELF(filename, bus);
    PC=entry_point;
    std::cout << "PC is: 0x" << std::hex << entry_point << std::dec << "\n";

}

void Machine::setPC(uint32_t value)
{
    PC = value;
}


void Machine::dumpMemory(std::ostream& out) {
    
    for (uint32_t addr = 0; addr < MEMORY_SIZE; ++addr) {
        uint8_t byte = bus.loadFromMem(addr, 8);
        out.put(byte);
    }

}

void Machine::fetch() {
    std::cout << "Using PC: 0x" << std::hex << PC << std::dec << "\n";

    if (PC > MEMORY_SIZE - 4) { 
        std::cerr << "Segfault: PC out of bounds at 0x" << std::hex << PC << "\n";
        exit(1);
    }

    instr.instr=bus.loadFromMem(PC, WORD_SIZE_BITS); // Already in little endian
    

    PC += 4;
}

void Machine::decode()
{
    decodedInstr = decoder.decode(instr.instr);
    std::cout << "Opcode is : 0x" << std::hex << static_cast<int>(decodedInstr.opcode) << std::dec << "\n";

}

Decoder::InstrType Machine::getInstrTypeEnum(uint8_t opcode)
{
    switch(opcode) {
        case 0x33: return Decoder::InstrType::R_TYPE;       // R-type (e.g., ADD, SUB)
        case 0x13: return Decoder::InstrType::I_TYPE;       // I-type (e.g., ADDI, ANDI)
        case 0x03: return Decoder::InstrType::I_TYPE;       // Load instructions
        case 0x67: return Decoder::InstrType::JALR_TYPE;    // JALR (I-type but special behavior)
        case 0x73: return Decoder::InstrType::ECALL_TYPE;   // ECALL
        case 0x23: return Decoder::InstrType::S_TYPE;       // Store (SB, SH, SW)
        case 0x63: return Decoder::InstrType::B_TYPE;       // Branch (BEQ, BNE, etc.)
        case 0x17: return Decoder::InstrType::U_TYPE;       // AUIPC
        case 0x37: return Decoder::InstrType::U_TYPE;       // LUI
        case 0x6F: return Decoder::InstrType::J_TYPE;       // JAL
        default:   return Decoder::InstrType::UNKNOWN_TYPE;
    }

}

void Machine::execute()
{
    Decoder::InstrType instrType = getInstrTypeEnum(decodedInstr.opcode);

    switch (instrType) {

    case Decoder::InstrType::B_TYPE: {
        uint32_t src1 = R.readFromRegister(decodedInstr.rs1);
        uint32_t src2 = R.readFromRegister(decodedInstr.rs2);
        bool branch_taken = false;

        switch (decodedInstr.funct3) {
        case 0x0: branch_taken = (src1 == src2); break;          // BEQ
        case 0x1: branch_taken = (src1 != src2); break;          // BNE
        case 0x4: branch_taken = (int32_t(src1) < int32_t(src2)); break;  // BLT
        case 0x5: branch_taken = (int32_t(src1) >= int32_t(src2)); break; // BGE
        case 0x6: branch_taken = (src1 < src2); break;           // BLTU
        case 0x7: branch_taken = (src1 >= src2); break;          // BGEU
        default:
            std::cerr << "Unknown branch funct3: " << std::hex << int(decodedInstr.funct3) << std::dec << "\n";
            break;
        }

        if (branch_taken) {
            PC = PC + decodedInstr.imm - 4; 
            std::cout << "Branch taken to 0x" << std::hex << PC << std::dec << "\n";
        }
        else {
            std::cout << "Branch not taken\n";
        }

    
        // Branch instructions do NOT write registers
        break;  
    }

    case Decoder::InstrType::U_TYPE: {
        if (decodedInstr.opcode == 0x17) { // AUIPC
            uint32_t src1 = PC;
            uint32_t src2 = decodedInstr.imm;
            uint32_t result = 0;
            alu.execute(ALU::AluOp::Add, src1, src2, result);
            R.writeToRegister(decodedInstr.rd, result);
        }
        else if (decodedInstr.opcode == 0x37) { // LUI
            R.writeToRegister(decodedInstr.rd, decodedInstr.imm);
        }
        break; 
    }

    case Decoder::InstrType::J_TYPE: { // JAL

        R.writeToRegister(decodedInstr.rd, PC);
        PC = (PC - 4) + decodedInstr.imm; // jump target
        break; 
    }

    case Decoder::InstrType::JALR_TYPE: { // JALR (I-type, opcode 0x67)

        uint32_t target = (R.readFromRegister(decodedInstr.rs1) + decodedInstr.imm) & ~1U;
        uint32_t return_addr = PC;
        R.writeToRegister(decodedInstr.rd, return_addr);
        PC = target;
        break; 
    }

    case Decoder::InstrType::S_TYPE: { // Store instructions
        uint32_t addr = R.readFromRegister(decodedInstr.rs1) + decodedInstr.imm;
        uint32_t val = R.readFromRegister(decodedInstr.rs2);

        switch (decodedInstr.funct3) {
        case 0x0: // SB
            bus.storeInMem(addr, BYTE_SIZE, val & 0xFF); // lowest 8 bits
            break;
        case 0x1: // SH
            bus.storeInMem(addr, HALF_WORD_SIZE_BITS, val & 0xFFFF); // lowest 16 bits
            break;
        case 0x2: // SW
            bus.storeInMem(addr, WORD_SIZE_BITS, val);
            break;
        default:
            std::cerr << "Unknown store funct3: " << std::hex << int(decodedInstr.funct3) << std::dec << "\n";
        }
        break; 
    }

    case Decoder::InstrType::R_TYPE: {
        ALU::AluOp op = alu.getAluOp(decodedInstr);

        uint32_t src1 = R.readFromRegister(decodedInstr.rs1);
        uint32_t src2 = R.readFromRegister(decodedInstr.rs2);

        uint32_t result = 0;
        alu.execute(op, src1, src2, result);

        R.writeToRegister(decodedInstr.rd, result);
        break; 
    }

    case Decoder::InstrType::I_TYPE: {
        if (decodedInstr.opcode == 0x03) { // Load instructions
            uint32_t base = R.readFromRegister(decodedInstr.rs1);
            uint32_t addr = base + decodedInstr.imm;
            uint32_t val = 0;

            switch (decodedInstr.funct3) {
            case 0x0: // LB
                val = decoder.signExtend(bus.loadFromMem(addr, BYTE_SIZE), BYTE_SIZE);
                break;
            case 0x1: // LH
                val = decoder.signExtend(bus.loadFromMem(addr, HALF_WORD_SIZE_BITS), HALF_WORD_SIZE_BITS);
                break;
            case 0x2: // LW
                val = bus.loadFromMem(addr, WORD_SIZE_BITS);
                break;
            case 0x4: // LBU
                val = bus.loadFromMem(addr, BYTE_SIZE);
                break;
            case 0x5: // LHU
                val = bus.loadFromMem(addr, HALF_WORD_SIZE_BITS);
                break;
            default:
                std::cerr << "Unknown load funct3: " << std::hex << int(decodedInstr.funct3) << std::dec << "\n";
                break;
            }

            R.writeToRegister(decodedInstr.rd, val);
        }
        else { // ALU-based I-type instructions
            ALU::AluOp op = alu.getAluOp(decodedInstr);
            uint32_t src1 = R.readFromRegister(decodedInstr.rs1);
            uint32_t src2 = decodedInstr.imm;

            uint32_t result = 0;
            alu.execute(op, src1, src2, result);

            std::cout << "I-type: x" << int(decodedInstr.rd) << " = " << result << "\n";
            R.writeToRegister(decodedInstr.rd, result);
        }
        break;
    }
    default:
        std::cerr << "Unknown instruction type in execute\n";
        break;
    }
}