v2.2.7

- Add support for IAR tools and C startup code (irq vector)
- Fix standard CLINT vectored mode (jmp instr)
- Fix various trap & emulation bugs (E21 CLIC)
- Add vector table mtvec.s (CLINT/CLIC)
- Minor changes to zones' code to comply with standard CLINT vector
- hexfive-conf @098e5a(2.2.7+), hexfive-kern @3d13f6(2.2.7)

.settings/language.settings.xml

@@ -4,7 +4,7 @@
 		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="1356915691844643014" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -march=rv32i -mabi=ilp32 -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true" store-entries-with-project="false">
+			<provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="1354357599751835014" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -march=rv32i -mabi=ilp32 -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true" store-entries-with-project="false">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
@@ -14,7 +14,7 @@
 		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="1356915691844643014" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -march=rv32i -mabi=ilp32 -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true" store-entries-with-project="false">
+			<provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="1354357599751835014" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -march=rv32i -mabi=ilp32 -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true" store-entries-with-project="false">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>

bsp/N22-ILM/newlib/crt0.S

@@ -7,10 +7,16 @@
 _start:
 	.cfi_startproc
 	.cfi_undefined ra
-.option push
-.option norelax
+
+    /* setup trap vector */
+    la a0, _mtvec
+    csrw mtvec, a0
+    csrs mtvec, 1
+
+	.option push
+	.option norelax
 	la gp, __global_pointer$
-.option pop
+	.option pop
 	la sp, _sp
 
 	/* Load data section */
@@ -36,7 +42,6 @@ _start:
 	bltu a0, a1, 1b
 2:
 
-
 	/* Call global constructors */
 	la a0, __libc_fini_array
 	call atexit
@@ -65,3 +70,5 @@ _init: ret
   	.type   _fini, @function
 _fini: ret
   	.size  _fini, .-_fini
+
+    .include "mtvec.s"

bsp/N22-ILM/newlib/mtvec.s

@@ -0,0 +1,47 @@
+/* Copyright(C) 2020 Hex Five Security, Inc. - All Rights Reserved */
+
+        .align 2
+
+_mtvec:
+
+irq0:   .word trp_isr
+irq1:   .word 1f
+irq2:   .word 1f
+irq3:   .word msi_isr
+irq4:   .word 1f
+irq5:   .word 1f
+irq6:   .word 1f
+irq7:   .word tmr_isr
+irq8:   .word 1f
+irq9:   .word 1f
+irq10:  .word 1f
+irq11:  .word 1f
+irq12:  .word 1f
+irq13:  .word 1f
+irq14:  .word 1f
+irq15:  .word 1f
+irq16:  .word 1f
+irq17:  .word 1f
+irq18:  .word 1f
+irq19:  .word 1f
+irq20:  .word 1f
+irq21:  .word 1f
+irq22:  .word 1f
+irq23:  .word 1f
+irq24:  .word 1f
+irq25:  .word gpio_isr
+irq26:  .word 1f
+irq27:  .word uart_isr
+irq28:  .word dma_isr
+irq29:  .word 1f
+irq30:  .word 1f
+irq31:  .word 1f
+
+        .weak trp_isr, msi_isr, tmr_isr, dma_isr, uart_isr, gpio_isr
+
+trp_isr:
+msi_isr:
+tmr_isr:
+dma_isr:
+gpio_isr:
+1:      j .

bsp/N22-ILM/newlib/newlib.mk

@@ -6,6 +6,7 @@ all: $(TARGET)
 ASM_SRCS += $(NEWLIB_DIR)/crt0.S
 C_SRCS += $(NEWLIB_DIR)/newlib.c
 
+INCLUDES += -I$(NEWLIB_DIR)
 INCLUDES += -I$(PLATFORM_DIR)
 
 LDFLAGS += -T $(PLATFORM_DIR)/memory.lds