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hpnair authored Mar 20, 2024
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<h1>Harideep Nair</h1>
<h2>PhD Candidate, Carnegie Mellon University</h2>
<h2>Neuromorphic Computing, Computer Architecture, Machine/Deep Learning</h2>
<a href="https://github.com/hpnair/hpnair.github.io/blob/main/Harideep_Resume.pdf" class="btn-rounded-white">View Resume</a>
<a href="https://github.com/hpnair/hpnair.github.io/blob/main/Harideep_PhD_Resume.pdf" class="btn-rounded-white">View Resume</a>
<a href="https://scholar.google.com/citations?user=pBTOjy0AAAAJ&hl=en&authuser=2" class="btn-rounded-white">View Google Scholar</a>
</div>
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<li>
Spring 2022
</li>
<li>
Spring 2023
</li>
<li>
Spring 2024
</li>
</ul>
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Fall 2021
</li>
<li>
Fall 2022 (Consulting TA)
Fall 2022
</li>
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Fall 2023
</li>
</ul>
</div>
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<li>VHDL</li>
<li>PyTorch</li>
<li>TensorFlow</li>
<li>Edge Impulse</li>
<li>Gem5</li>
<li>Snipersim</li>
<li>Ramulator</li>
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<h3>Extra-Curricular Activities</h3>
<ul>
<li>
Participated in <b>Young Asian Leaders Global Conference</b> at Nanyang Technological University, Singapore.
Reviewer for IEEE International Symposium on Circuits and Systems (<b>ISCAS</b>) 2024.
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<li>
<b>Eleven</b> Teaching Assistantships at CMU (led 10 of them as the head TA) and one at IIT Bombay.
</li>
<li>
Invited for <b>Young Asian Leaders Global Conference</b> at Nanyang Technological University, Singapore.
</li>
<li>
Part of the winning team in Intra-Institute Electrical Circuit Designing Competition.
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