[SYCL] Support seq_cst memory order in atomic_ref for AMDGPU targets #12938
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@intel/llvm-reviewers-runtime / @sergey-semenov . Can you take another look at this one now, if possible. It is required now since oneapi-src/unified-runtime#1415 was merged for the related tests to pass the CI. Thanks! |
| @@ -1,4 +1,4 @@ | |||
| // RUN: %{build} -O3 -o %t.out -Xsycl-target-backend=nvptx64-nvidia-cuda --cuda-gpu-arch=sm_70 | |||
| // RUN: %clangxx -fsycl -fsycl-targets=%{sycl_triple} %if any-device-is-cuda %{ -Xsycl-target-backend --cuda-gpu-arch=sm_70 %} %s -o %t.out | |||
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Why can't you use %{build}?
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The AMDGPU backend supports sequential consistency ordering semantics for all atomics correctly and implements for all relevant architectures since GCN.
Updated the
acq_relandseq_cstmemory order tests to build and run for CUDA devices with specifically sm_70 capabilities or on other device targets (i.e. amd-hip) that support these ordering semantics.