• TensorFlow Lite for Microcontrollers
• Build Status
  • Official Builds
  • Community Supported TFLM Examples
  • Community Supported Kernels and Unit Tests
• Contributing
• Getting Help
• Additional Documentation
• RFCs

Introduction

This tensorflow micro-lite target is Knowles IA8201. The base is https://github.com/cad-audio/tflite-micro update: 07/23/2024

Prerequisite

• Xtensa Development Kit, 2020.4-RI Linux/Win32
• Contributing

Build library

build/build_xtensa_lib.sh

target-platform:

• dmx: DMX core
• hmd: HMD core
• hifi: HMD core/ hifi-3 instruction hmd core

make-target:

• << empty is release >>
• test_kernel_fully_connected_test

example: build dmx test

$ cd build
$ bash build_xtensa_lib.sh dmx test 

or make command make a release hifi

$ make -f tensorflow/lite/micro/tools/make/Makefile TARGET=xtensa OPTIMIZED_KERNEL_DIR=xtensa TARGET_ARCH=hifi3 \
XTENSA_TOOLS_VERSION=RI-2020.4-linux XTENSA_CORE=hmd1aRI04 XTENSA_BASE=/home/jimchen/xtensa/XtDevTools/install/ \
 BUILD_TYPE=release RM_TFLM_SIGNAL=1 TEST_MODE=0

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• Xtensa SVDF/FC was optimized by HMD MVM instructions by enabling USE_HMD_MVM_OPT macro
• The kernl's weights was supposed re-mapping in the external

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TensorFlow Lite for Microcontrollers

TensorFlow Lite for Microcontrollers is a port of TensorFlow Lite designed to run machine learning models on DSPs, microcontrollers and other devices with limited memory.

Additional Links:

• Tensorflow github repository
• TFLM at tensorflow.org

Build Status

• GitHub Status

Official Builds

Build Type	Status
CI (Linux)
Code Sync

Community Supported TFLM Examples

This table captures platforms that TFLM has been ported to. Please see New Platform Support for additional documentation.

Platform	Status
Arduino
Coral Dev Board Micro	TFLM + EdgeTPU Examples for Coral Dev Board Micro
Espressif Systems Dev Boards
Renesas Boards	TFLM Examples for Renesas Boards
Silicon Labs Dev Kits	TFLM Examples for Silicon Labs Dev Kits
Sparkfun Edge
Texas Instruments Dev Boards

Community Supported Kernels and Unit Tests

This is a list of targets that have optimized kernel implementations and/or run the TFLM unit tests using software emulation or instruction set simulators.

Build Type	Status
Cortex-M
Hexagon
RISC-V
Xtensa
Generate Integration Test

Contributing

See our contribution documentation.

Getting Help

A Github issue should be the primary method of getting in touch with the TensorFlow Lite Micro (TFLM) team.

The following resources may also be useful:

1. SIG Micro email group and monthly meetings.

2. SIG Micro gitter chat room.

3. For questions that are not specific to TFLM, please consult the broader TensorFlow project, e.g.:

   • Create a topic on the TensorFlow Discourse forum
   • Send an email to the TensorFlow Lite mailing list
   • Create a TensorFlow issue
   • Create a Model Optimization Toolkit issue

Additional Documentation

• Continuous Integration
• Benchmarks
• Profiling
• Memory Management
• Logging
• Porting Reference Kernels from TfLite to TFLM
• Optimized Kernel Implementations
• New Platform Support
• Platform/IP support
  • Arm IP support
• Software Emulation with Renode
• Software Emulation with QEMU
• Python Dev Guide
• Automatically Generated Files
• Python Interpreter Guide

RFCs

1. Pre-allocated tensors
2. TensorFlow Lite for Microcontrollers Port of 16x8 Quantized Operators