Read the full report here: report.pdf
Group Members: Shridhar Patil, Jai Bellare, Visharad Srivastava
An 8-bit CPU based on the course project of CprE 2810, taught by Prof. Alexander Stoytchev at Iowa State University.
References:
Not mentioned in the diagram are the assumed clock (positive edge-triggered), reset (asynchronous and active high) and run (asynchronous and active high) nets.