Merge pull request #8 from jrbyrnes/featureMerge

Resolve cacheline issues

include/opt-sched/Scheduler/register.h

@@ -20,6 +20,18 @@ using namespace llvm;
 namespace llvm {
 namespace opt_sched {
 
+
+struct paddedVals {
+  int crntUseCnt_;
+  int num_;
+  int padding2;
+  int padding3;
+  int padding4;
+  int padding5;
+  int padding6;
+  int padding7;
+};
+
 // Represents a a single register of a certain type and tracks the number of
 // times this register is defined and used.
 class Register {
@@ -32,8 +44,8 @@ class Register {
   int16_t GetType() const;
   void SetType(int16_t type);
 
-  int GetNum() const;
-  void SetNum(int num);
+  int GetNum(int SolverID) const;
+  void SetNum(int SolverID, int num);
 
   inline int getNumSolvers() {return NumSolvers_; }
   void setNumSolvers(int NumSolvers);
@@ -93,10 +105,11 @@ class Register {
 
 private:
   int16_t type_;
-  int num_;
+  //int num_;
   int defCnt_;
   int useCnt_;
-  int *crntUseCnt_;
+  paddedVals *cachedVals;
+  paddedVals *otherCachedVals;
   int crntLngth_;
   int physicalNumber_;
   BitVector conflicts_;

include/opt-sched/Scheduler/sched_basic_data.h

@@ -575,7 +575,7 @@ class SchedInstruction : public GraphNode {
   /***************************************************************************
    * Used during scheduling                                                  *
    ***************************************************************************/
-  SISchedFields *DynamicFields_;
+  SISchedFields *DynamicFields_ = NULL;
   // Whether the instruction is currently in the Ready List.
   //bool *ready_;
   // Each entry in this array holds the cycle in which this instruction will

lib/Scheduler/aco.cpp

@@ -528,14 +528,14 @@ static void PrintInstruction(SchedInstruction *inst) {
   for (auto def : llvm::enumerate(inst->GetDefs())) {
     if (def.index() != 0)
       std::cerr << ", ";
-    std::cerr << def.value()->GetNum() << def.value()->GetType();
+    std::cerr << def.value()->GetNum(0) << def.value()->GetType();
   }
 
   std::cerr << " uses ";
   for (auto use : llvm::enumerate(inst->GetUses())) {
     if (use.index() != 0)
       std::cerr << ", ";
-    std::cerr << use.value()->GetNum() << use.value()->GetType();
+    std::cerr << use.value()->GetNum(0) << use.value()->GetType();
   }
   std::cerr << std::endl;
 }

lib/Scheduler/bb_thread.cpp

@@ -28,7 +28,6 @@
 #include <malloc.h>
 #include <atomic>
 
-
 extern bool OPTSCHED_gPrintSpills;
 
 using namespace llvm::opt_sched;
@@ -503,7 +502,7 @@ void BBThread::updateSpillInfoForSchdul(SchedInstruction *inst,
   // Update Live regs after uses
   for (llvm::opt_sched::Register *use : inst->GetUses()) {
     regType = use->GetType();
-    regNum = use->GetNum();
+    regNum = use->GetNum(SolverID_);
     physRegNum = use->GetPhysicalNumber();
 
     if (use->IsLive(SolverID_) == false)
@@ -544,7 +543,7 @@ void BBThread::updateSpillInfoForSchdul(SchedInstruction *inst,
   // Update Live regs after defs
   for (llvm::opt_sched::Register *def : inst->GetDefs()) {
     regType = def->GetType();
-    regNum = def->GetNum();
+    regNum = def->GetNum(SolverID_);
     physRegNum = def->GetPhysicalNumber();
 
 #ifdef IS_DEBUG_REG_PRESSURE
@@ -710,7 +709,7 @@ void BBThread::updateSpillInfoForUnSchdul(SchedInstruction *inst) {
   // Update Live regs
   for (llvm::opt_sched::Register *def : inst->GetDefs()) {
     regType = def->GetType();
-    regNum = def->GetNum();
+    regNum = def->GetNum(SolverID_);
     physRegNum = def->GetPhysicalNumber();
 
 #ifdef IS_DEBUG_REG_PRESSURE
@@ -737,7 +736,7 @@ void BBThread::updateSpillInfoForUnSchdul(SchedInstruction *inst) {
 
   for (llvm::opt_sched::Register *use : inst->GetUses()) {
     regType = use->GetType();
-    regNum = use->GetNum();
+    regNum = use->GetNum(SolverID_);
     physRegNum = use->GetPhysicalNumber();
 
 #ifdef IS_DEBUG_REG_PRESSURE
@@ -1809,9 +1808,10 @@ FUNC_RESULT BBWorker::enumerate_(Milliseconds StartTime,
             return rslt;
         }
     }
-
-  assert(getLocalPoolSize(SolverID_ - 2) == 0 || MasterSched_->GetSpillCost() == 0 || RegionSched_->GetSpillCost() == 0 || rslt == RES_TIMEOUT || rslt == RES_ERROR || rslt == RES_EXIT);
 
+
+
+  assert(getLocalPoolSize(SolverID_ - 2) == 0 || MasterSched_->GetSpillCost() == 0 || RegionSched_->GetSpillCost() == 0 || rslt == RES_TIMEOUT || rslt == RES_ERROR || rslt == RES_EXIT);
 
   if (true) {
       DataDepGraph_->resetThreadWriteFields(SolverID_, false);
@@ -1828,6 +1828,7 @@ FUNC_RESULT BBWorker::enumerate_(Milliseconds StartTime,
   if (!GlobalPool_->empty()) {
     if (RegionSched_->GetSpillCost() == 0 || MasterSched_->GetSpillCost() == 0) return RES_SUCCESS;
 
+    //Logger::Info("in global pool\n");
     std::shared_ptr<HalfNode> temp;
     while (true) {
       GlobalPoolLock_->lock();
@@ -2673,6 +2674,7 @@ FUNC_RESULT BBMaster::Enumerate_(Milliseconds startTime, Milliseconds rgnTimeout
     CPU_ZERO(&cpuset);
     CPU_SET(j, &cpuset);
     CPU_SET(j+NumThreads_, &cpuset);
+
     int rc = pthread_setaffinity_np(ThreadManager[j].native_handle(),
                                     sizeof(cpu_set_t), &cpuset);
   }

lib/Scheduler/enumerator.cpp

@@ -13,6 +13,7 @@
 
 using namespace llvm::opt_sched;
 
+
 class InstPool4;
 
 int HalfNode::getAndRemoveNextPrefixInst() {
@@ -54,7 +55,7 @@ EnumTreeNode::~EnumTreeNode() {
   assert(isCnstrctd_ || rdyLst_ == NULL);
 
   if (isCnstrctd_) {
-      assert(frwrdLwrBounds_ != NULL);
+      //assert(frwrdLwrBounds_ != NULL);
       delete[] frwrdLwrBounds_;
 
       assert(exmndInsts_ != NULL);
@@ -304,7 +305,7 @@ void EnumTreeNode::NewBranchExmnd(SchedInstruction *inst, bool isLegal,
                                   bool isBrnchFsbl, DIRECTION dir,
                                   bool isLngthFsbl) {
   if (inst != NULL) {
-    InstCount deadline = inst->GetCrntDeadline(enumrtr_->getSolverID());
+    InstCount deadline = enumrtr_->bbt_->isSecondPass() ? inst->GetCrntDeadline(enumrtr_->getSolverID()) : -1;
     InstCount cycleNum = enumrtr_->GetCycleNumFrmTime_(time_ + 1);
     InstCount slotNum = enumrtr_->GetSlotNumFrmTime_(time_ + 1);
 
@@ -847,6 +848,7 @@ bool Enumerator::Initialize_(InstSchedule *sched, InstCount trgtLngth, int Solve
     return false;
   }
 
+  // TODO -- disable this stuff for first pass
   rlxdSchdulr_->Initialize(false);
 
   if (preFxdInstCnt_ > 0) {
@@ -897,6 +899,8 @@ bool Enumerator::Initialize_(InstSchedule *sched, InstCount trgtLngth, int Solve
 /*****************************************************************************/
 
 bool Enumerator::InitPreFxdInsts_() {
+  // TODO -- parameterize
+  if (true) return true;
   for (InstCount i = 0; i < preFxdInstCnt_; i++) {
     bool fsbl = preFxdInsts_[i]->ApplyPreFxng(tightndLst_, fxdLst_, SolverID_);
     if (!fsbl)
@@ -946,7 +950,8 @@ void Enumerator::CreateRootNode_() {
 
   CreateNewRdyLst_();
   rootNode_->SetRdyLst(rdyLst_);
-  rootNode_->SetLwrBounds(DIR_FRWRD);
+  if (bbt_->isSecondPass())
+    rootNode_->SetLwrBounds(DIR_FRWRD);
   assert(rsrvSlotCnt_ == 0);
   rootNode_->SetRsrvSlots(rsrvSlotCnt_, rsrvSlots_);
   bool setCost = true;
@@ -1392,7 +1397,7 @@ bool Enumerator::ProbeBranch_(SchedInstruction *inst, EnumTreeNode *&newNode,
 
   // If this instruction is prefixed, it cannot be scheduled earlier than its
   // prefixed cycle
-  if (inst != NULL)
+  if (inst != NULL && bbt_->isSecondPass())
     if (inst->GetPreFxdCycle() != INVALID_VALUE)
       if (inst->GetPreFxdCycle() != crntCycleNum_) {
 #ifdef IS_DEBUG_SEARCH_ORDER
@@ -1402,7 +1407,7 @@ bool Enumerator::ProbeBranch_(SchedInstruction *inst, EnumTreeNode *&newNode,
         return false;
       }
 
-  if (inst != NULL) {
+  if (inst != NULL && bbt_->isSecondPass()) {
     if (inst->GetCrntLwrBound(DIR_FRWRD) > crntCycleNum_) {
 #ifdef IS_DEBUG_INFSBLTY_TESTS
       stats::forwardLBInfeasibilityHits++;
@@ -1495,7 +1500,8 @@ bool Enumerator::ProbeBranch_(SchedInstruction *inst, EnumTreeNode *&newNode,
   state_.instFxd = true;
 
   newNode = nodeAlctr_->Alloc(crntNode_, inst, this);
-  newNode->SetLwrBounds(DIR_FRWRD);
+  if (bbt_->isSecondPass())
+    newNode->SetLwrBounds(DIR_FRWRD);
   newNode->SetRsrvSlots(rsrvSlotCnt_, rsrvSlots_);
 
   // If a node (sub-problem) that dominates the candidate node (sub-problem)
@@ -2124,7 +2130,8 @@ bool Enumerator::BackTrack_(bool trueState) {
   }
 
   crntSched_->RemoveLastInst();
-  RestoreCrntLwrBounds_(inst, trueState);
+  if (bbt_->isSecondPass())
+    RestoreCrntLwrBounds_(inst, trueState);
 
   if (inst != NULL) {
     // int hitCnt;
@@ -2334,6 +2341,7 @@ void Enumerator::CmtLwrBoundTightnng_() {
 /*****************************************************************************/
 
 bool Enumerator::FixInsts_(SchedInstruction *newInst) {
+  if (!bbt_->isSecondPass()) return true;
   bool fsbl = true;
 
   bool newInstFxd = false;
@@ -2382,6 +2390,7 @@ bool Enumerator::FixInsts_(SchedInstruction *newInst) {
 /*****************************************************************************/
 
 void Enumerator::UnFixInsts_(SchedInstruction *newInst) {
+  if (!bbt_->isSecondPass()) return;
   InstCount unfxdInstCnt = 0;
   SchedInstruction *inst;
 
@@ -3173,7 +3182,8 @@ void LengthCostEnumerator::CreateRootNode_() {
   rootNode_ = nodeAlctr_->Alloc(NULL, NULL, this);
   CreateNewRdyLst_();
   rootNode_->SetRdyLst(rdyLst_);
-  rootNode_->SetLwrBounds(DIR_FRWRD);
+  if (bbt_->isSecondPass())
+    rootNode_->SetLwrBounds(DIR_FRWRD);
 
   assert(rsrvSlotCnt_ == 0);
   rootNode_->SetRsrvSlots(rsrvSlotCnt_, rsrvSlots_);
@@ -3229,7 +3239,8 @@ void LengthCostEnumerator::scheduleInt(int instNum, EnumTreeNode *newNode, bool
   }
 
   newNode = nodeAlctr_->Alloc(crntNode_, inst, this);
-  newNode->SetLwrBounds(DIR_FRWRD);
+  if (bbt_->isSecondPass())
+    newNode->SetLwrBounds(DIR_FRWRD);
   newNode->SetRsrvSlots(rsrvSlotCnt_, rsrvSlots_);
 
   assert(newNode);
@@ -3304,7 +3315,8 @@ void LengthCostEnumerator::scheduleNode(EnumTreeNode *node, bool isPseudoRoot, b
   }
 
   newNode = nodeAlctr_->Alloc(crntNode_, inst, this, false);
-  newNode->SetLwrBounds(DIR_FRWRD);
+  if (bbt_->isSecondPass())
+    newNode->SetLwrBounds(DIR_FRWRD);
   newNode->SetRsrvSlots(rsrvSlotCnt_, rsrvSlots_);
 
   assert(newNode);
@@ -3877,8 +3889,8 @@ EnumTreeNode *LengthCostEnumerator::allocAndInitNextNode(std::pair<SchedInstruct
 
   InitNode->setPrefix(subPrefix);
   InitNode->setPrevNode(parent);
-
-  InitNode->SetLwrBounds(DIR_FRWRD);
+  if (bbt_->isSecondPass())
+    InitNode->SetLwrBounds(DIR_FRWRD);
   InitNode->SetRsrvSlots(rsrvSlotCnt_, rsrvSlots_);
 
   assert(InitNode);
@@ -3949,7 +3961,8 @@ EnumTreeNode *LengthCostEnumerator::allocAndInitNextNode(std::pair<SchedInstruct
   }
 
   crntSched_->RemoveLastInst();
-  RestoreCrntLwrBounds_(inst);
+  if (bbt_->isSecondPass())
+    RestoreCrntLwrBounds_(inst);
 
   if (inst != NULL) {
     // int hitCnt;

lib/Scheduler/reg_alloc.cpp

@@ -52,7 +52,7 @@ void LocalRegAlloc::AllocRegs() {
     // Find registers for this instruction's VReg uses.
     for (Register *use : inst->GetUses()) {
       int16_t regType = use->GetType();
-      int virtRegNum = use->GetNum();
+      int virtRegNum = use->GetNum(0);
 #ifdef RA_BUG
       Logger::Info("found use %d", virtRegNum);
 #endif
@@ -75,7 +75,7 @@ void LocalRegAlloc::AllocRegs() {
     // Kill registers if this is the last use for them.
     for (Register *use : inst->GetUses()) {
       int16_t regType = use->GetType();
-      int virtRegNum = use->GetNum();
+      int virtRegNum = use->GetNum(0);
       RegMap &map = regMaps_[regType][virtRegNum];
       std::vector<int> &physRegs = physRegs_[regType];
 
@@ -99,7 +99,7 @@ void LocalRegAlloc::AllocRegs() {
     // Process definitions.
     for (Register *def : inst->GetDefs()) {
       int16_t regType = def->GetType();
-      int virtRegNum = def->GetNum();
+      int virtRegNum = def->GetNum(0);
 #ifdef RA_BUG
       Logger::Info("found def %d", virtRegNum);
 #endif
@@ -254,7 +254,7 @@ void LocalRegAlloc::ScanUses_() {
 #endif
 
     for (Register *use : inst->GetUses()) {
-      int virtRegNum = use->GetNum();
+      int virtRegNum = use->GetNum(0);
       int16_t regType = use->GetType();
       if (regMaps_[regType].find(virtRegNum) == regMaps_[regType].end()) {
         RegMap m;
@@ -286,7 +286,7 @@ void LocalRegAlloc::AddLiveIn_(SchedInstruction *artificialEntry) {
 #endif
   for (Register *def : artificialEntry->GetDefs()) {
     int16_t regType = def->GetType();
-    int virtRegNum = def->GetNum();
+    int virtRegNum = def->GetNum(0);
 #ifdef RA_BUG
     Logger::Info("Found live in def vreg %d", virtRegNum);
 #endif