Fixed typo

kth-step · Sep 13, 2024 · ddd015c · ddd015c
1 parent c4b43b0
commit ddd015c
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/src/tools/lifter/selftest_riscv.sml b/src/tools/lifter/selftest_riscv.sml
@@ -156,8 +156,8 @@ val _ = print_msg "\n";
    * memory address in x2 with offset 8 *)
   val _ = riscv_test_hex_print_asm "SW x14, 8(x2)" "00E12423";
 
-  (* Usage of the zero register: ("SW x0, 0(t2)") *)
-  val _ = riscv_test_hex_print_asm "SW x0, 0(t2)" "0003A023";
+  (* Usage of the zero register: ("SW x0, 0(x7)") *)
+  val _ = riscv_test_hex_print_asm "SW x0, 0(x7)" "0003A023";
 
 (* I-format (opcode OP-IMM) *)
   val _ = riscv_test_asms [