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Close path for fpu adder/subtractor #3169

Close path for fpu adder/subtractor

Close path for fpu adder/subtractor #3169

Triggered via pull request January 21, 2025 03:15
Status Failure
Total duration 15m 48s
Artifacts 1

main.yml

on: pull_request
Synthesize full core
47s
Synthesize full core
Build regression tests (riscv-tests)
51s
Build regression tests (riscv-tests)
Build regression tests (riscv-arch-test)
41s
Build regression tests (riscv-arch-test)
Run unit tests
6m 49s
Run unit tests
Check code formatting and typing
28s
Check code formatting and typing
Run regression tests (riscv-tests)
4m 52s
Run regression tests (riscv-tests)
Run regression tests (riscv-arch-test)
14m 43s
Run regression tests (riscv-arch-test)
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1 error and 5 warnings
Run unit tests
Process completed with exit code 1.
Check code formatting and typing
ubuntu-latest pipelines will use ubuntu-24.04 soon. For more details, see https://github.com/actions/runner-images/issues/10636
Build regression tests (riscv-arch-test)
ubuntu-latest pipelines will use ubuntu-24.04 soon. For more details, see https://github.com/actions/runner-images/issues/10636
Synthesize full core
ubuntu-latest pipelines will use ubuntu-24.04 soon. For more details, see https://github.com/actions/runner-images/issues/10636
Build regression tests (riscv-tests)
ubuntu-latest pipelines will use ubuntu-24.04 soon. For more details, see https://github.com/actions/runner-images/issues/10636
Run unit tests
ubuntu-latest pipelines will use ubuntu-24.04 soon. For more details, see https://github.com/actions/runner-images/issues/10636

Artifacts

Produced during runtime
Name Size
verilog-full-core
647 KB