Close path for fpu adder/subtractor #3169
main.yml
on: pull_request
Synthesize full core
47s
Build regression tests (riscv-tests)
51s
Build regression tests (riscv-arch-test)
41s
Run unit tests
6m 49s
Check code formatting and typing
28s
Run regression tests (riscv-tests)
4m 52s
Run regression tests (riscv-arch-test)
14m 43s
Annotations
1 error and 5 warnings
Run unit tests
Process completed with exit code 1.
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Check code formatting and typing
ubuntu-latest pipelines will use ubuntu-24.04 soon. For more details, see https://github.com/actions/runner-images/issues/10636
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Build regression tests (riscv-arch-test)
ubuntu-latest pipelines will use ubuntu-24.04 soon. For more details, see https://github.com/actions/runner-images/issues/10636
|
Synthesize full core
ubuntu-latest pipelines will use ubuntu-24.04 soon. For more details, see https://github.com/actions/runner-images/issues/10636
|
Build regression tests (riscv-tests)
ubuntu-latest pipelines will use ubuntu-24.04 soon. For more details, see https://github.com/actions/runner-images/issues/10636
|
Run unit tests
ubuntu-latest pipelines will use ubuntu-24.04 soon. For more details, see https://github.com/actions/runner-images/issues/10636
|
Artifacts
Produced during runtime
Name | Size | |
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verilog-full-core
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647 KB |
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