Add missing clobbers to coroutine context switch assembly

[lalinsky]

Summary

• Add condition flag and FP status register clobbers that were missing from the inline assembly context switch
• x86_64: cc, st0-st7
• aarch64: nzcv
• arm/thumb: cpsr
• riscv64/riscv32: fflags, frm
• loongarch64: fcc0-fcc7, fcsr0-fcsr3
• powerpc64 was already complete

Test plan

• ./check.sh --filter "Coroutine" passes (all 12 tests)

[coderabbitai]

📝 Walkthrough

Walkthrough

Expanded inline assembly context-switching code in src/coro/coroutines.zig to preserve additional processor and floating-point state across multiple architectures (x86_64, aarch64, arm, riscv, powerpc) by adding flags and registers to clobber sets and corresponding restoration logic.

Changes

Cohort / File(s)	Summary
Coroutine Context-Switch State Preservation src/coro/coroutines.zig	Extended inline-asm clobber sets and restoration paths for x86_64 (.cc, .st0–.st7, .dirflag), aarch64 (.nzcv), arm (.cpsr), riscv64/riscv32 (.fflags, .frm), and powerpc (expanded FP/status registers). Control flow unchanged; only expanded CPU/FP state coverage.

Estimated code review effort

🎯 4 (Complex) | ⏱️ ~45 minutes

Possibly related PRs

• Add RISC-V 64-bit architecture support #125: Adds RISC-V floating-point register preservation (fflags/frm) to the same context-switch assembly paths.
• Fix aarch64 context switch #138: Modifies AArch64 clobber/restore behavior in the same inline-assembly context-switching code.
• Add PowerPC 64-bit coroutine context switching #327: Expands PowerPC context-switch processor/FP state handling in the coroutine implementation.

Poem

✨ Across the silicon landscape wide,
State gets tucked and pushed aside,
Flags and registers find their place,
From x86 to RISC's embrace—
One switch, all cores remember the ride. 🔄

🚥 Pre-merge checks | ✅ 3

✅ Passed checks (3 passed)

Check name	Status	Explanation
Title check	✅ Passed	The title 'Add missing clobbers to coroutine context switch assembly' directly and specifically describes the main change in the changeset.
Description check	✅ Passed	The description details the specific clobbers added across multiple architectures and includes a test plan demonstrating the changes work correctly.
Docstring Coverage	✅ Passed	No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.

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✨ Finishing Touches

🧪 Generate unit tests (beta)

• Create PR with unit tests
• Post copyable unit tests in a comment
• Commit unit tests in branch add-missing-clobbers

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[coderabbitai]

🧹 Nitpick comments (1)

src/coro/coroutines.zig (1)

240-253: x86_64: .cc alongside .rflags — potentially redundant but harmless.

Line 243 already declares .rflags = true, and line 244 adds .cc = true. In LLVM's model, cc is the canonical condition-code clobber and typically maps to the same flags register. Having both declared shouldn't cause problems — the compiler just gets told twice that flags are toast. The st0–st7 additions are spot-on; x87 FPU state isn't saved/restored across the switch, so clobbering them is necessary.

🤖 Prompt for AI Agents

Verify each finding against the current code and only fix it if needed.

In `@src/coro/coroutines.zig` around lines 240 - 253, Remove the redundant ".cc =
true" entry from the clobber list so only ".rflags = true" declares the
condition-code/flags clobber; keep the x87 st0–st7 entries as-is. Locate the
clobber structure containing ".rflags = true" and ".cc = true" in
src/coro/coroutines.zig and delete the ".cc = true" line to avoid the duplicate
flags declaration.

🤖 Prompt for all review comments with AI agents

Verify each finding against the current code and only fix it if needed.

Nitpick comments:
In `@src/coro/coroutines.zig`:
- Around line 240-253: Remove the redundant ".cc = true" entry from the clobber
list so only ".rflags = true" declares the condition-code/flags clobber; keep
the x87 st0–st7 entries as-is. Locate the clobber structure containing ".rflags
= true" and ".cc = true" in src/coro/coroutines.zig and delete the ".cc = true"
line to avoid the duplicate flags declaration.