VTE is a library that allows fast and simple generation of C++ testers for modules written in Chisel and build an efficient interface to existing C++ based simulators. It contains Scala-based interface and C++ testbench class. Scala interface interacts with Firtl Interpreter and generates a basic set of C++ testbench files. These files contain the list of the Device Under Test (DUT) input-output ports as well as their parameters. C++ testbench provides functionalities similar to the Chisel PeekPokeTester, such as poke, expect, step functions. As a backend it uses Verilator.
Verilator Testbench Environment (VTE) Copyright (c) 2018, The Regents of the University of California, through Lawrence Berkeley National Laboratory (subject to receipt of any required approvals from the U.S. Dept. of Energy). All rights reserved.
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