feat: BitVec
unsigned order theoretic results
#5297
Merged
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Proves that
<
and<=
onBitVec
are (strict) (total) partial orders. This is required for theUInt
asBitVec
refactor.This does open the question how to state these theorems "correctly" for
BitVec
, we have both<
living inProp
andBitVec.ult
living inBool
. We might of course say to always use<
but: Once we start addingIntX
we need to prove the same results forBitVec.slt
to provide an equivalent API. So it would appear that it is unavoidable to have a= true
variant of these theorems there?Question answered: Use
<
andslt
.