Consolidate AVX2 and SSE4.2 generation into one module

fearless_simd_gen/src/arch/x86.rs

@@ -2,7 +2,7 @@
 // SPDX-License-Identifier: Apache-2.0 OR MIT
 
 use crate::types::{ScalarType, VecType};
-use proc_macro2::{Ident, Span, TokenStream};
+use proc_macro2::{Ident, TokenStream};
 use quote::{format_ident, quote};
 
 pub(crate) fn translate_op(op: &str) -> Option<&'static str> {
@@ -28,17 +28,6 @@ pub(crate) fn translate_op(op: &str) -> Option<&'static str> {
     })
 }
 
-pub(crate) fn arch_ty(ty: &VecType) -> Ident {
-    let suffix = match (ty.scalar, ty.scalar_bits) {
-        (ScalarType::Float, 32) => "",
-        (ScalarType::Float, 64) => "d",
-        (ScalarType::Float, _) => unimplemented!(),
-        (ScalarType::Unsigned | ScalarType::Int | ScalarType::Mask, _) => "i",
-    };
-    let name = format!("__m{}{}", ty.scalar_bits * ty.len, suffix);
-    Ident::new(&name, Span::call_site())
-}
-
 pub(crate) fn expr(op: &str, ty: &VecType, args: &[TokenStream]) -> TokenStream {
     if let Some(op_name) = translate_op(op) {
         let sign_aware = matches!(op, "max" | "min");

fearless_simd_gen/src/main.rs

@@ -16,14 +16,13 @@ use crate::level::Level as _;
 mod arch;
 mod generic;
 mod level;
-mod mk_avx2;
 mod mk_fallback;
 mod mk_neon;
 mod mk_ops;
 mod mk_simd_trait;
 mod mk_simd_types;
-mod mk_sse4_2;
 mod mk_wasm;
+mod mk_x86;
 mod ops;
 mod types;
 
@@ -65,8 +64,8 @@ impl Module {
             Self::Neon => mk_neon::Neon.make_module(),
             Self::Wasm => mk_wasm::WasmSimd128.make_module(),
             Self::Fallback => mk_fallback::Fallback.make_module(),
-            Self::Sse4_2 => mk_sse4_2::Sse4_2.make_module(),
-            Self::Avx2 => mk_avx2::Avx2.make_module(),
+            Self::Sse4_2 => mk_x86::X86::Sse4_2.make_module(),
+            Self::Avx2 => mk_x86::X86::Avx2.make_module(),
         }
     }