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Fixing conversion uint64 into uint32
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aletempiac committed Oct 4, 2023
1 parent 2fe683d commit 84e5fc5
Showing 1 changed file with 11 additions and 11 deletions.
22 changes: 11 additions & 11 deletions include/mockturtle/utils/struct_library.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -678,7 +678,7 @@ class struct_library

return res.index;
}
else /* try bottom decomposition */
else /* try bottom decomposition */
{
auto couple = try_bottom_dec( tt, tt.num_vars() );
i = std::get<0>( couple );
Expand All @@ -696,7 +696,7 @@ class struct_library

return compute_dsd( tt_shr, mapped_support, rule );
}
else /* do shannon decomposition */
else /* do shannon decomposition */
{
kitty::dynamic_truth_table co0( tt.num_vars() );
kitty::dynamic_truth_table co1( tt.num_vars() );
Expand Down Expand Up @@ -837,7 +837,7 @@ class struct_library
}
else // it is root
{
dsd_node new_root = { node_type::and_, rule.size(), { { 1, 0 }, { 1, n.index } } };
dsd_node new_root = { node_type::and_, static_cast<uint32_t>( rule.size() ), { { 1, 0 }, { 1, n.index } } };
aig_rule.insert( aig_rule.begin(), new_root );
}
}
Expand Down Expand Up @@ -874,10 +874,10 @@ class struct_library
}
else // it is root
{
dsd_node new_root = { node_type::and_, rule.size() + 2, { { 1, 0 }, { 1, rule.size() + 1 } } };
dsd_node node_or = { node_type::and_, rule.size() + 1, { { 1, rule.size() - 1 }, { 1, rule.size() } } };
dsd_node node_and1 = { node_type::and_, rule.size(), { { 0, n.fanin[2].index }, { n.fanin[1].inv, n.fanin[1].index } } };
new_node = { node_type::and_, rule.size() - 1, { { 1, n.fanin[2].index }, { n.fanin[0].inv, n.fanin[0].index } } }; // and0_node
dsd_node new_root = { node_type::and_, static_cast<uint32_t>( rule.size() + 2 ), { { 1, 0 }, { 1, static_cast<uint32_t>( rule.size() ) + 1 } } };
dsd_node node_or = { node_type::and_, static_cast<uint32_t>( rule.size() + 1 ), { { 1, static_cast<uint32_t>( rule.size() - 1 ) }, { 1, static_cast<uint32_t>( rule.size() ) } } };
dsd_node node_and1 = { node_type::and_, static_cast<uint32_t>( rule.size() ), { { 0, n.fanin[2].index }, { n.fanin[1].inv, n.fanin[1].index } } };
new_node = { node_type::and_, static_cast<uint32_t>( rule.size() - 1 ), { { 1, n.fanin[2].index }, { n.fanin[0].inv, n.fanin[0].index } } }; // and0_node

aig_rule.insert( aig_rule.begin(), new_root );
aig_rule.insert( aig_rule.begin(), node_or );
Expand Down Expand Up @@ -917,10 +917,10 @@ class struct_library
}
else // it is root
{
dsd_node new_root = { node_type::and_, rule.size() + 2, { { 1, 0 }, { 1, rule.size() + 1 } } };
dsd_node node_or = { node_type::and_, rule.size() + 1, { { 1, rule.size() - 1 }, { 1, rule.size() } } };
dsd_node node_and1 = { node_type::and_, rule.size(), { { 0, n.fanin[0].index }, { 1, n.fanin[1].index } } };
new_node = { node_type::and_, rule.size() - 1, { { 1, n.fanin[0].index }, { 0, n.fanin[1].index } } }; // and0_node
dsd_node new_root = { node_type::and_, static_cast<uint32_t>( rule.size() + 2 ), { { 1, 0 }, { 1, static_cast<uint32_t>( rule.size() + 1 ) } } };
dsd_node node_or = { node_type::and_, static_cast<uint32_t>( rule.size() + 1 ), { { 1, static_cast<uint32_t>( rule.size() - 1 ) }, { 1, static_cast<uint32_t>( rule.size() ) } } };
dsd_node node_and1 = { node_type::and_, static_cast<uint32_t>( rule.size() ), { { 0, n.fanin[0].index }, { 1, n.fanin[1].index } } };
new_node = { node_type::and_, static_cast<uint32_t>( rule.size() - 1 ), { { 1, n.fanin[0].index }, { 0, n.fanin[1].index } } }; // and0_node

aig_rule.insert( aig_rule.begin(), new_root );
aig_rule.insert( aig_rule.begin(), node_or );
Expand Down

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