doc: DMA can also raise RTIOUnderflow

m-labs · Mar 3, 2018 · 87b51cb · 87b51cb
1 parent 232940e
commit 87b51cb
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/artiq/coredevice/exceptions.py b/artiq/coredevice/exceptions.py
@@ -71,8 +71,8 @@ class CacheError(Exception):
 
 
 class RTIOUnderflow(Exception):
-    """Raised when the CPU fails to submit a RTIO event early enough
-    (with respect to the event's timestamp).
+    """Raised when the CPU or DMA core fails to submit a RTIO event early
+    enough (with respect to the event's timestamp).
 
     The offending event is discarded and the RTIO core keeps operating.
     """