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  • Munich, Bavaria, Germany
  • 02:26 (UTC +01:00)
  • LinkedIn in/htmos6

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marslan6/README.md

Hi there! 👋 I'm Mehmet Arslan

I am an FPGA & Embedded Software Engineer based in Munich/Germany.

  • 🎓 M.Sc. in Communications & Electronics at Technical University of Munich.
  • 🎓 B.Sc. in Electrical & Electronics Engineering from Middle East Technical University.

I bridge the gap between hardware and software, with experience ranging from RTL design to kernel-level driver development.

🔧 Technical Expertise

Hardware Design & Verification

I specialize in RTL design and computer architecture, having engineered RISC-V and MIPS processors on FPGA targets. My workflow includes comprehensive verification using OSVVM/UVVM and implementation via Vivado and Quartus.

VHDL Verilog SystemVerilog Vivado Quartus RISC-V MIPS

Embedded Systems & Real-Time Software

I develop low-latency firmware and kernel-level drivers for Arm architectures, utilizing real-time operating systems like VxWorks, Zephyr, and FreeRTOS. My application-layer work includes building perception systems with OpenCV and GUIs with Qt.

C C++ Arm VxWorks Zephyr FreeRTOS Linux Qt OpenCV

Software Development & Scripting

I build reusable SDKs and automate verification workflows using C# and Python (Cocotb). I maintain rigorous version control and build environments using Git and CMake to ensure reliable software delivery.

Python MATLAB C# Git CMake Tcl

Pinned Loading

  1. Risc-V Risc-V Public

    Modular RISC‑V processor and its building blocks

    VHDL

  2. ARM-Pipelined-Processor-With-Branch-Predictor ARM-Pipelined-Processor-With-Branch-Predictor Public

    A 32-bit ARM Pipelined Processor Implementation in Verilog HDL along with Forwarding, Hazard Detection, Handling and a Branch Predictor.

    Verilog 4

  3. Quality-of-Service-Based-Queuing Quality-of-Service-Based-Queuing Public

    To optimize QoS, a queuing algorithm was implemented using Verilog HDL on FPGAs for networks.

    Verilog 4

  4. ARM-Processor-Designs ARM-Processor-Designs Public

    Repository with single-cycle, multi-cycle, and pipelined processor designs for architecture labs. Enables study and experimentation to understand processor functionality and performance improvemen…

    Verilog

  5. Light-Based-LED-Driver Light-Based-LED-Driver Public

    TSL 2561 light sensor based LED and LCD 5110 driver implementations with Tiva TM4C123 board.

    Assembly

  6. Virtual-Machine Virtual-Machine Public

    Implementation of an LC3 Virtual Machine with a Simple Operating System (OS) that Executes Assembly Language Programs.

    C++ 1