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Merge pull request #626 from mbbsemu/GE-Fixes
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Bit Rotation & FPU Evaluation Fixes
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@paladine
paladine authored Jun 24, 2024
2 parents 71cf3e7 + b732d5e commit ea04395
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Showing 7 changed files with 163 additions and 67 deletions.
2 changes: 2 additions & 0 deletions MBBSEmu.Tests/CPU/FCOMPP_Tests.cs
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Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,8 @@ public class FCOMPP_Tests : CpuTestBase
[InlineData(1d, 1d, (ushort)EnumFpuStatusFlags.Code3)]
[InlineData(double.NaN, 0d, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
[InlineData(0d, double.NaN, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
[InlineData(double.PositiveInfinity, 0d, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
[InlineData(0d, double.NegativeInfinity, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
public void FCOMPP_Test(double ST0Value, double ST1Value, ushort expectedFlags)
{
Reset();
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9 changes: 9 additions & 0 deletions MBBSEmu.Tests/CPU/FCOM_Tests.cs
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Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,10 @@ public class FCOM_Tests : CpuTestBase
[InlineData(double.MinValue, 0d, (ushort)EnumFpuStatusFlags.Code0)]
[InlineData(1d, 1d, (ushort)EnumFpuStatusFlags.Code3)]
[InlineData(double.NaN, 0d, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
[InlineData(double.NegativeInfinity, 0d, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
[InlineData(0d, double.NaN, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
[InlineData(0d, double.PositiveInfinity, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
[InlineData(double.NegativeInfinity, double.PositiveInfinity, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
public void FCOM_ST1_Test(double ST0Value, double ST1Value, ushort expectedFlags)
{
Reset();
Expand All @@ -42,7 +45,10 @@ public void FCOM_ST1_Test(double ST0Value, double ST1Value, ushort expectedFlags
[InlineData(float.MinValue, 0d, (ushort)EnumFpuStatusFlags.Code0)]
[InlineData(1d, 1d, (ushort)EnumFpuStatusFlags.Code3)]
[InlineData(float.NaN, 0d, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
[InlineData(float.NegativeInfinity, 0d, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
[InlineData(0d, float.NaN, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
[InlineData(0d, float.PositiveInfinity, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
[InlineData(float.NegativeInfinity, float.PositiveInfinity, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
public void FCOM_M32_Test(double ST0Value, float m32Value, ushort expectedFlags)
{
Reset();
Expand Down Expand Up @@ -70,7 +76,10 @@ public void FCOM_M32_Test(double ST0Value, float m32Value, ushort expectedFlags)
[InlineData(double.MinValue, 0d, (ushort)EnumFpuStatusFlags.Code0)]
[InlineData(1d, 1d, (ushort)EnumFpuStatusFlags.Code3)]
[InlineData(double.NaN, 0d, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
[InlineData(double.NegativeInfinity, 0d, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
[InlineData(0d, double.NaN, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
[InlineData(0d, double.PositiveInfinity, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
[InlineData(double.NegativeInfinity, double.PositiveInfinity, (ushort)(EnumFpuStatusFlags.Code0 | EnumFpuStatusFlags.Code2 | EnumFpuStatusFlags.Code3))]
public void FCOM_M64_Test(double ST0Value, double m32Value, ushort expectedFlags)
{
Reset();
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30 changes: 15 additions & 15 deletions MBBSEmu.Tests/CPU/FILD_Tests.cs
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Original file line number Diff line number Diff line change
Expand Up @@ -9,9 +9,9 @@ public class FILD_Tests : CpuTestBase
{
[Theory]
[InlineData(0)]
[InlineData(ushort.MaxValue)]
[InlineData(ushort.MinValue)]
public void FILD_Test_M16(ushort valueToLoad)
[InlineData(short.MaxValue)]
[InlineData(short.MinValue)]
public void FILD_Test_M16(short valueToLoad)
{
Reset();

Expand All @@ -30,8 +30,8 @@ public void FILD_Test_M16(ushort valueToLoad)

[Theory]
[InlineData(1, 2)]
[InlineData(ushort.MaxValue, ushort.MinValue)]
public void FILD_Multiple_Test_M16(ushort st0, ushort st1)
[InlineData(short.MaxValue, short.MinValue)]
public void FILD_Multiple_Test_M16(short st0, short st1)
{
Reset();

Expand All @@ -54,9 +54,9 @@ public void FILD_Multiple_Test_M16(ushort st0, ushort st1)

[Theory]
[InlineData(0)]
[InlineData(uint.MaxValue)]
[InlineData(uint.MinValue)]
public void FILD_Test_M32(uint valueToLoad)
[InlineData(int.MaxValue)]
[InlineData(int.MinValue)]
public void FILD_Test_M32(int valueToLoad)
{
Reset();

Expand All @@ -75,8 +75,8 @@ public void FILD_Test_M32(uint valueToLoad)

[Theory]
[InlineData(1, 2)]
[InlineData(uint.MaxValue, uint.MinValue)]
public void FILD_Multiple_Test_M32(uint st0, uint st1)
[InlineData(int.MaxValue, int.MinValue)]
public void FILD_Multiple_Test_M32(int st0, int st1)
{
Reset();

Expand All @@ -99,9 +99,9 @@ public void FILD_Multiple_Test_M32(uint st0, uint st1)

[Theory]
[InlineData(0)]
[InlineData(ulong.MaxValue)]
[InlineData(ulong.MinValue)]
public void FILD_Test_M64(ulong valueToLoad)
[InlineData(long.MaxValue)]
[InlineData(long.MinValue)]
public void FILD_Test_M64(long valueToLoad)
{
Reset();

Expand All @@ -120,8 +120,8 @@ public void FILD_Test_M64(ulong valueToLoad)

[Theory]
[InlineData(1, 2)]
[InlineData(ulong.MaxValue, ulong.MinValue)]
public void FILD_Multiple_Test_M64(ulong st0, ulong st1)
[InlineData(long.MaxValue, long.MinValue)]
public void FILD_Multiple_Test_M64(long st0, long st1)
{
Reset();

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26 changes: 14 additions & 12 deletions MBBSEmu.Tests/CPU/RLC_Tests.cs → MBBSEmu.Tests/CPU/RCL_Tests.cs
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Original file line number Diff line number Diff line change
Expand Up @@ -7,13 +7,13 @@ namespace MBBSEmu.Tests.CPU
public class RCL_Tests : CpuTestBase
{
[Theory]
[InlineData(0x8000, 1, false, 0x0000, true)] // Rotate left with carry in, resulting in CF set
[InlineData(0x8000, 1, true, 0x0001, true)] // Rotate left with carry in, resulting in CF set, and LSB set from previous CF
[InlineData(0x0001, 1, false, 0x0002, false)] // Simple rotate left
[InlineData(0x0000, 1, true, 0x0001, false)] // Rotate with carry flag set, no bit set in value
[InlineData(0xFFFF, 4, false, 0xFFF7, true)] // Rotate left multiple times
[InlineData(0x8000, 1, false, 0x0000, true, true)] // Rotate left with carry in, resulting in CF set
[InlineData(0x8000, 1, true, 0x0001, true, true)] // Rotate left with carry in, resulting in CF set, and LSB set from previous CF
[InlineData(0x0001, 1, false, 0x0002, false, false)] // Simple rotate left
[InlineData(0x0000, 1, true, 0x0001, false, false)] // Rotate with carry flag set, no bit set in value
[InlineData(0xFFFF, 4, false, 0xFFF7, true, false)] // Rotate left multiple times
public void Op_Rcl_16_Test(ushort axValue, byte bitsToRotate, bool initialCarryFlag, ushort expectedResult,
bool expectedCarryFlag)
bool expectedCarryFlag, bool expectedOverflowFlag)
{
Reset();
mbbsEmuCpuRegisters.AX = axValue;
Expand All @@ -27,16 +27,17 @@ public void Op_Rcl_16_Test(ushort axValue, byte bitsToRotate, bool initialCarryF

Assert.Equal(expectedResult, mbbsEmuCpuRegisters.AX);
Assert.Equal(expectedCarryFlag, mbbsEmuCpuRegisters.CarryFlag);
Assert.Equal(expectedOverflowFlag, mbbsEmuCpuRegisters.OverflowFlag);
}

[Theory]
[InlineData(0x80, 1, false, 0x00, true)] // Rotate left with carry in, resulting in CF set
[InlineData(0x80, 1, true, 0x01, true)] // Rotate left with carry in, resulting in CF set, and LSB set from previous CF
[InlineData(0x01, 1, false, 0x02, false)] // Simple rotate left
[InlineData(0x00, 1, true, 0x01, false)] // Rotate with carry flag set, no bit set in value
[InlineData(0xFF, 4, false, 0xF7, true)] // Rotate left multiple times
[InlineData(0x80, 1, false, 0x00, true, true)] // Rotate left with carry in, resulting in CF set
[InlineData(0x80, 1, true, 0x01, true, true)] // Rotate left with carry in, resulting in CF set, and LSB set from previous CF
[InlineData(0x01, 1, false, 0x02, false, false)] // Simple rotate left
[InlineData(0x00, 1, true, 0x01, false, false)] // Rotate with carry flag set, no bit set in value
[InlineData(0xFF, 4, false, 0xF7, true, false)] // Rotate left multiple times
public void Op_Rcl_8_Test(byte alValue, byte bitsToRotate, bool initialCarryFlag, ushort expectedResult,
bool expectedCarryFlag)
bool expectedCarryFlag, bool expectedOverflowFlag)
{
Reset();
mbbsEmuCpuRegisters.AL = alValue;
Expand All @@ -50,6 +51,7 @@ public void Op_Rcl_8_Test(byte alValue, byte bitsToRotate, bool initialCarryFlag

Assert.Equal(expectedResult, mbbsEmuCpuRegisters.AL);
Assert.Equal(expectedCarryFlag, mbbsEmuCpuRegisters.CarryFlag);
Assert.Equal(expectedOverflowFlag, mbbsEmuCpuRegisters.OverflowFlag);

}
}
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79 changes: 48 additions & 31 deletions MBBSEmu.Tests/CPU/RCR_Tests.cs
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Original file line number Diff line number Diff line change
Expand Up @@ -5,18 +5,20 @@

namespace MBBSEmu.Tests.CPU
{
public class RCR_Tests : CpuTestBase
public class RCR_Tests : CpuTestBase
{
[Theory]
[InlineData(0xF, 1, 0x7, true)]
[InlineData(0xE, 1, 0x7, false)]
[InlineData(0x1FF, 1, 0xFF, true)]
[InlineData(0x1FE, 1, 0xFF, false)]
[InlineData(0x3C, 2, 0xF, false)]
[InlineData(0x3E, 2, 0xF, true)]
[InlineData(0xFFFF, 2, 0xBFFF, true)]
[InlineData(0xF, 1, 0x7, true, false)]
[InlineData(0xE, 1, 0x7, false, false)]
[InlineData(0x6, 1, 0x3, false, false)]
[InlineData(0x1FF, 1, 0xFF, true, false)]
[InlineData(0x1FE, 1, 0xFF, false, false)]
[InlineData(0x3C, 2, 0xF, false, false)]
[InlineData(0x3E, 2, 0xF, true, false)]
[InlineData(0xFFFF, 1, 0x7FFF, true, true)]
[InlineData(0xFFFF, 2, 0xBFFF, true, false)]
public void RCR_AX_IMM16_CF_CLEAR(ushort axValue, byte bitsToRotate, ushort expectedValue,
bool expectedCFValue)
bool expectedCFValue, bool expectedOFValue)
{
Reset();
mbbsEmuCpuRegisters.AX = axValue;
Expand All @@ -29,17 +31,20 @@ public void RCR_AX_IMM16_CF_CLEAR(ushort axValue, byte bitsToRotate, ushort expe

Assert.Equal(expectedValue, mbbsEmuCpuRegisters.AX);
Assert.Equal(expectedCFValue, mbbsEmuCpuRegisters.CarryFlag);
Assert.Equal(expectedOFValue, mbbsEmuCpuRegisters.OverflowFlag);
}

[Theory]
[InlineData(0xF, 1, 0x8007, true)]
[InlineData(0xE, 1, 0x8007, false)]
[InlineData(0x1FF, 1, 0x80FF, true)]
[InlineData(0x1FE, 1, 0x80FF, false)]
[InlineData(0x3C, 2, 0x400F, false)]
[InlineData(0x3E, 2, 0x400F, true)]
[InlineData(0xFFFF, 2, 0xFFFF, true)]
public void RCR_AX_IMM16_CF_SET(ushort axValue, byte bitsToRotate, ushort expectedValue, bool expectedCFValue)
[InlineData(0xF, 1, 0x8007, true, true)]
[InlineData(0xF, 2, 0xC003, true, false)]
[InlineData(0xE, 1, 0x8007, false, true)]
[InlineData(0x1FF, 1, 0x80FF, true, true)]
[InlineData(0x1FE, 1, 0x80FF, false, true)]
[InlineData(0x3C, 2, 0x400F, false, false)]
[InlineData(0x3E, 2, 0x400F, true, false)]
[InlineData(0xFFFF, 2, 0xFFFF, true, false)]
[InlineData(0xFFFF, 1, 0xFFFF, true, false)]
public void RCR_AX_IMM16_CF_SET(ushort axValue, byte bitsToRotate, ushort expectedValue, bool expectedCFValue, bool expectedOFValue)
{
Reset();
mbbsEmuCpuRegisters.AX = axValue;
Expand All @@ -53,12 +58,16 @@ public void RCR_AX_IMM16_CF_SET(ushort axValue, byte bitsToRotate, ushort expect

Assert.Equal(expectedValue, mbbsEmuCpuRegisters.AX);
Assert.Equal(expectedCFValue, mbbsEmuCpuRegisters.CarryFlag);
Assert.Equal(expectedOFValue, mbbsEmuCpuRegisters.OverflowFlag);
}

[Theory]
[InlineData(0xF, 1, 0x7, true)]
[InlineData(0xE, 1, 0x7, false)]
public void RCR_AH_IMM8_CF_CLEAR(byte ahValue, byte bitsToRotate, byte expectedValue, bool expectedCFValue)
[InlineData(0xF, 1, 0x7, true, false)]
[InlineData(0xFF, 1, 0x7F, true, true)]
[InlineData(0xFF, 2, 0xBF, true, false)]
[InlineData(0x0, 1, 0x0, false, false)]
[InlineData(0xE, 1, 0x7, false, false)]
public void RCR_AH_IMM8_CF_CLEAR(byte ahValue, byte bitsToRotate, byte expectedValue, bool expectedCFValue, bool expectedOFValue)
{
Reset();
mbbsEmuCpuRegisters.AH = ahValue;
Expand All @@ -71,12 +80,16 @@ public void RCR_AH_IMM8_CF_CLEAR(byte ahValue, byte bitsToRotate, byte expectedV

Assert.Equal(expectedValue, mbbsEmuCpuRegisters.AH);
Assert.Equal(expectedCFValue, mbbsEmuCpuRegisters.CarryFlag);
Assert.Equal(expectedOFValue, mbbsEmuCpuRegisters.OverflowFlag);
}

[Theory]
[InlineData(0xF, 1, 0x87, true)]
[InlineData(0xE, 1, 0x87, false)]
public void RCR_AH_IMM8_CF_SET(byte ahValue, byte bitsToRotate, ushort expectedValue, bool expectedCFValue)
[InlineData(0xF, 1, 0x87, true, true)]
[InlineData(0x7F, 1, 0xBF, true, true)]
[InlineData(0xFF, 2, 0xFF, true, false)]
[InlineData(0x0, 1, 0x80, false, true)]
[InlineData(0xE, 1, 0x87, false, true)]
public void RCR_AH_IMM8_CF_SET(byte ahValue, byte bitsToRotate, ushort expectedValue, bool expectedCFValue, bool expectedOFValue)
{
Reset();
mbbsEmuCpuRegisters.AH = ahValue;
Expand All @@ -90,18 +103,21 @@ public void RCR_AH_IMM8_CF_SET(byte ahValue, byte bitsToRotate, ushort expectedV

Assert.Equal(expectedValue, mbbsEmuCpuRegisters.AH);
Assert.Equal(expectedCFValue, mbbsEmuCpuRegisters.CarryFlag);
Assert.Equal(expectedOFValue, mbbsEmuCpuRegisters.OverflowFlag);
}

[Theory]
[InlineData(0xF, 1, 0x7, true)]
[InlineData(0xE, 1, 0x7, false)]
[InlineData(0x1FF, 1, 0xFF, true)]
[InlineData(0x1FE, 1, 0xFF, false)]
[InlineData(0x3C, 2, 0xF, false)]
[InlineData(0x3E, 2, 0xF, true)]
[InlineData(0xFFFF, 2, 0xBFFF, true)]
[InlineData(0xF, 1, 0x7, true, false)]
[InlineData(0xE, 1, 0x7, false, false)]
[InlineData(0x6, 1, 0x3, false, false)]
[InlineData(0x1FF, 1, 0xFF, true, false)]
[InlineData(0x1FE, 1, 0xFF, false, false)]
[InlineData(0x3C, 2, 0xF, false, false)]
[InlineData(0x3E, 2, 0xF, true, false)]
[InlineData(0xFFFF, 1, 0x7FFF, true, true)]
[InlineData(0xFFFF, 2, 0xBFFF, true, false)]
public void RCR_M16_IMM16_1(ushort memoryValue, byte bitsToRotate, ushort expectedValue,
bool expectedCFValue)
bool expectedCFValue, bool expectedOFValue)
{
Reset();
mbbsEmuCpuRegisters.DS = 2;
Expand All @@ -115,6 +131,7 @@ public void RCR_M16_IMM16_1(ushort memoryValue, byte bitsToRotate, ushort expect

Assert.Equal(expectedValue, mbbsEmuMemoryCore.GetWord(2, 0));
Assert.Equal(expectedCFValue, mbbsEmuCpuRegisters.CarryFlag);
Assert.Equal(expectedOFValue, mbbsEmuCpuRegisters.OverflowFlag);
}
}
}
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