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Hardware architecture for Differential Evolution optimization of the Hodgkin-Huxley model

Authors: Roberto Rodriguez Osorio, University of a Corunna, Spain; Manuel de Castro Caballero, University of Valladolid, Spain.

This repository was submitted as an artifact to the FCCM 2025 conference.

The included code implements the simulation of a hardware architecture for Differential Evolution to optimize the choice of parameters for the Hodgkin-Huxley model.

The hardware architecture is modelled using SystemC. The reader can set up the SystemC libraries and then compile and run the included code.

The simulation itself is considerably slow. Therefore, although the program will report every time a new solution outperforms an existing one, the user should not expect any real convergence in a reasonable time.

VHLD or Verilog code can be derived from this SystemC implementation, as it is cycle accurate. In our work Accelerating Scientific Model Optimization with a Pipelined FPGA-Based Differential Evolution Engine, presented as a poster at FCCM 2025, we have implemented the core Differential Evolution architecture using VHDL, and the floating point operations using AMD/Xilinx Vivado HLS. The resulting code, however, is not provided in this repository.

The user may try to convert SystemC to any HDL language and synthesize it. Considering that BRAM primitives are intended to mimic Xilinx's ones, some adaptation will be required when targetting Intel/Altera devices.

Lastly, our SystemC implementation does not include the code to extract and update the sets of solutions after a number of iterations.

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SystemC code modeling a cycle-accurate Differential Evolution of the Hodgkin-Huxley model.

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