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Rename edge to slot
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wks committed May 17, 2024
1 parent 1b0959f commit 8912d83
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Showing 8 changed files with 72 additions and 72 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -123,8 +123,8 @@
private Address edges;
private Word size = Word.zero();
// The buffer size agreed between the Rust part and the Java part of the binding.
// See the constant EDGES_BUFFER_CAPACITY in scanning.rs.
public static final Word EDGES_BUFFER_CAPACITY = Word.fromIntZeroExtend(4096);
// See the constant SLOTS_BUFFER_CAPACITY in scanning.rs.
public static final Word SLOTS_BUFFER_CAPACITY = Word.fromIntZeroExtend(4096);

/***********************************************************************
*
Expand Down Expand Up @@ -222,7 +222,7 @@ private void reportEdge(Address edge) {
if (VM.VerifyAssertions) VM._assert(!this.edges.isZero());
this.edges.plus(cursor.toInt() << LOG_BYTES_IN_WORD).store(edge);
// Flush if full
if (cursor.GE(EDGES_BUFFER_CAPACITY)) {
if (cursor.GE(SLOTS_BUFFER_CAPACITY)) {
flush();
}
}
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4 changes: 2 additions & 2 deletions mmtk/Cargo.lock

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2 changes: 1 addition & 1 deletion mmtk/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ log = {version = "0.4", features = ["max_level_trace", "release_max_level_off"]
# - change branch/rev
# - change repo name
# But other changes including adding/removing whitespaces in commented lines may break the CI.
mmtk = { git = "https://github.com/mmtk/mmtk-core.git", rev = "a02803b4104519ff2289234101a2dd8ceedd1bc7" }
mmtk = { git = "https://github.com/wks/mmtk-core.git", rev = "e46383ddbc60b3e418999294712e3b10a2c6282a" }
# Uncomment the following to build locally - if you change the path locally, do not commit the change in a PR
# mmtk = { path = "../repos/mmtk-core" }

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4 changes: 2 additions & 2 deletions mmtk/src/api.rs
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
use crate::scanning::EDGES_BUFFER_CAPACITY;
use crate::scanning::SLOTS_BUFFER_CAPACITY;
use collection::VMCollection;
use collection::BOOT_THREAD;
use libc::c_char;
Expand All @@ -25,7 +25,7 @@ use SINGLETON;
/// Caller needs to make sure the ptr is a valid vector pointer.
#[no_mangle]
pub unsafe extern "C" fn release_buffer(ptr: *mut Address) {
let _vec = Vec::<Address>::from_raw_parts(ptr, 0, EDGES_BUFFER_CAPACITY);
let _vec = Vec::<Address>::from_raw_parts(ptr, 0, SLOTS_BUFFER_CAPACITY);
}

#[no_mangle]
Expand Down
10 changes: 5 additions & 5 deletions mmtk/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -43,11 +43,11 @@ pub static mut JTOC_BASE: Address = Address::ZERO;
#[derive(Default)]
pub struct JikesRVM;

/// The type of edges in JikesRVM.
/// The type of slots in JikesRVM.
///
/// TODO: We start with Address to ease the transition.
/// We should switch to the equivalent `mmtk::vm::edge_shape::SimpleEdge` later.
pub type JikesRVMEdge = Address;
/// We should switch to the equivalent `mmtk::vm::slot::SimpleSlot` later.
pub type JikesRVMSlot = Address;

impl VMBinding for JikesRVM {
type VMObjectModel = object_model::VMObjectModel;
Expand All @@ -56,8 +56,8 @@ impl VMBinding for JikesRVM {
type VMActivePlan = active_plan::VMActivePlan;
type VMReferenceGlue = reference_glue::VMReferenceGlue;

type VMEdge = JikesRVMEdge;
type VMMemorySlice = mmtk::vm::edge_shape::UnimplementedMemorySlice<JikesRVMEdge>;
type VMSlot = JikesRVMSlot;
type VMMemorySlice = mmtk::vm::slot::UnimplementedMemorySlice<JikesRVMSlot>;

#[cfg(target_arch = "x86")]
// On Intel we align code to 16 bytes as recommended in the optimization manual.
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36 changes: 18 additions & 18 deletions mmtk/src/scan_boot_image.rs
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
use crate::scanning::EDGES_BUFFER_CAPACITY;
use crate::scanning::SLOTS_BUFFER_CAPACITY;
use crate::unboxed_size_constants::*;
use crate::JikesRVM;
use crate::JikesRVMEdge;
use crate::JikesRVMSlot;
use entrypoint::*;
use java_size_constants::*;
use mmtk::scheduler::*;
Expand All @@ -26,7 +26,7 @@ static REFS: AtomicUsize = AtomicUsize::new(0);

pub fn scan_boot_image(
_tls: OpaquePointer,
factory: &mut impl RootsWorkFactory<JikesRVMEdge>,
factory: &mut impl RootsWorkFactory<JikesRVMSlot>,
subwork_id: usize,
total_subwork: usize,
) {
Expand All @@ -48,22 +48,22 @@ pub fn scan_boot_image(
ROOTS.store(0, Ordering::Relaxed);
REFS.store(0, Ordering::Relaxed);

let mut edges = vec![];
let mut slots = vec![];
while cursor < map_end {
trace!("Processing chunk at {:x}", cursor);
process_chunk(cursor, image_start, map_start, map_end, |edge| {
edges.push(edge);
if edges.len() >= EDGES_BUFFER_CAPACITY {
let new_edges =
mem::replace(&mut edges, Vec::with_capacity(EDGES_BUFFER_CAPACITY));
factory.create_process_edge_roots_work(new_edges);
process_chunk(cursor, image_start, map_start, map_end, |slot| {
slots.push(slot);
if slots.len() >= SLOTS_BUFFER_CAPACITY {
let new_slots =
mem::replace(&mut slots, Vec::with_capacity(SLOTS_BUFFER_CAPACITY));
factory.create_process_slot_roots_work(new_slots);
}
});
trace!("Chunk processed successfully");
cursor += stride;
}
if !edges.is_empty() {
factory.create_process_edge_roots_work(edges);
if !slots.is_empty() {
factory.create_process_slot_roots_work(slots);
}
}
}
Expand All @@ -73,7 +73,7 @@ fn process_chunk(
image_start: Address,
_map_start: Address,
map_end: Address,
mut report_edge: impl FnMut(Address),
mut report_slot: impl FnMut(Address),
) {
let mut value: usize;
let mut offset: usize = 0;
Expand Down Expand Up @@ -106,7 +106,7 @@ fn process_chunk(
if cfg!(feature = "debug") {
ROOTS.fetch_add(1, Ordering::Relaxed);
}
report_edge(slot);
report_slot(slot);
}
if runlength != 0 {
for _ in 0..runlength {
Expand All @@ -121,7 +121,7 @@ fn process_chunk(
ROOTS.fetch_add(1, Ordering::Relaxed);
}
// TODO: check_reference(slot) ?
report_edge(slot);
report_slot(slot);
}
}
}
Expand All @@ -141,13 +141,13 @@ fn decode_long_encoding(cursor: Address) -> usize {
}
}

pub struct ScanBootImageRoots<F: RootsWorkFactory<JikesRVMEdge>> {
pub struct ScanBootImageRoots<F: RootsWorkFactory<JikesRVMSlot>> {
factory: F,
subwork_id: usize,
total_subwork: usize,
}

impl<F: RootsWorkFactory<JikesRVMEdge>> ScanBootImageRoots<F> {
impl<F: RootsWorkFactory<JikesRVMSlot>> ScanBootImageRoots<F> {
pub fn new(factory: F, subwork_id: usize, total_subwork: usize) -> Self {
Self {
factory,
Expand All @@ -157,7 +157,7 @@ impl<F: RootsWorkFactory<JikesRVMEdge>> ScanBootImageRoots<F> {
}
}

impl<F: RootsWorkFactory<JikesRVMEdge>> GCWork<JikesRVM> for ScanBootImageRoots<F> {
impl<F: RootsWorkFactory<JikesRVMSlot>> GCWork<JikesRVM> for ScanBootImageRoots<F> {
fn do_work(&mut self, _worker: &mut GCWorker<JikesRVM>, _mmtk: &'static MMTK<JikesRVM>) {
scan_boot_image(
OpaquePointer::UNINITIALIZED,
Expand Down
26 changes: 13 additions & 13 deletions mmtk/src/scan_statics.rs
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
use crate::scanning::EDGES_BUFFER_CAPACITY;
use crate::scanning::SLOTS_BUFFER_CAPACITY;
use crate::JikesRVM;
use crate::JikesRVMEdge;
use crate::JikesRVMSlot;
use entrypoint::*;
use mmtk::scheduler::*;
use mmtk::util::opaque_pointer::*;
Expand All @@ -18,7 +18,7 @@ const CHUNK_SIZE_MASK: usize = 0xFFFFFFFF - (REF_SLOT_SIZE - 1);

pub fn scan_statics(
tls: VMWorkerThread,
factory: &mut impl RootsWorkFactory<JikesRVMEdge>,
factory: &mut impl RootsWorkFactory<JikesRVMSlot>,
subwork_id: usize,
total_subwork: usize,
) {
Expand All @@ -43,33 +43,33 @@ pub fn scan_statics(
(thread_ordinal + 1) * chunk_size
};

let mut edges = Vec::with_capacity(EDGES_BUFFER_CAPACITY);
let mut slot_list = Vec::with_capacity(SLOTS_BUFFER_CAPACITY);

let mut slot = start;
while slot < end {
let slot_offset = slot * 4;
// TODO: check_reference?
edges.push(slots + slot_offset);
if edges.len() >= EDGES_BUFFER_CAPACITY {
factory.create_process_edge_roots_work(edges);
edges = Vec::with_capacity(EDGES_BUFFER_CAPACITY);
slot_list.push(slots + slot_offset);
if slot_list.len() >= SLOTS_BUFFER_CAPACITY {
factory.create_process_slot_roots_work(slot_list);
slot_list = Vec::with_capacity(SLOTS_BUFFER_CAPACITY);
}
// trace.process_root_edge(slots + slot_offset, true);
slot += REF_SLOT_SIZE;
}
if !edges.is_empty() {
factory.create_process_edge_roots_work(edges);
if !slot_list.is_empty() {
factory.create_process_slot_roots_work(slot_list);
}
}
}

pub struct ScanStaticRoots<F: RootsWorkFactory<JikesRVMEdge>> {
pub struct ScanStaticRoots<F: RootsWorkFactory<JikesRVMSlot>> {
factory: F,
subwork_id: usize,
total_subwork: usize,
}

impl<F: RootsWorkFactory<JikesRVMEdge>> ScanStaticRoots<F> {
impl<F: RootsWorkFactory<JikesRVMSlot>> ScanStaticRoots<F> {
pub fn new(factory: F, subwork_id: usize, total_subwork: usize) -> Self {
Self {
factory,
Expand All @@ -79,7 +79,7 @@ impl<F: RootsWorkFactory<JikesRVMEdge>> ScanStaticRoots<F> {
}
}

impl<F: RootsWorkFactory<JikesRVMEdge>> GCWork<JikesRVM> for ScanStaticRoots<F> {
impl<F: RootsWorkFactory<JikesRVMSlot>> GCWork<JikesRVM> for ScanStaticRoots<F> {
fn do_work(&mut self, worker: &mut GCWorker<JikesRVM>, _mmtk: &'static MMTK<JikesRVM>) {
scan_statics(
worker.tls,
Expand Down
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