Advanced encryption standard implementation in Verilog.
ADVANCED ENCRYPTION STANDARD [128-BIT CTR MODE].
The Encryption process consists of different steps after taking the plaintext and the encryption key as an input it expands the key to 10 different keys and runs the plaintext through cycles of 4 functions to produce the final cipher.
SUB BYTES Each byte is replaced by a byte from the previously generated S-Box.
KEY EXPANSION The key expansion function takes the user supplied 16 bytes long key and utilizes round constant matrix rcon and the substitution table s_box to generate the next key to be used in the next cycle of encryption.
ADD ROUND KEY A bitwise xor of the state matrix and the cycle’s round key matrix.
SHIFT ROWS Each row is rotated to the left. The second row is rotated once, second row twice and third row three times.
MIX COLUMNS In this step we compute the new state matrix by left-multiplying the current state matrix by the polynomial matrix P.
Pseudo Code for the Cipher
Simulation : PLAINTEXT: 00112233445566778899aabbccddeeff
KEY: 000102030405060708090a0b0c0d0e0f
round output 69c4e0d86a7b0430d8cdb78070b4c55a
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Input =3243f6a8885a308d313198a2e0370734
Cipher Key =2b7e151628aed2a6abf7158809cf4f3c
Reference : FIPS 197, Advanced Encryption Standard (AES)