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All code found on nandland is here. underconstruction.gif
Verilog 316 71
SPI Master for FPGA - VHDL and Verilog
VHDL 264 96
SPI Slave for FPGA in Verilog and VHDL
Verilog 188 68
Single Port RAM, Dual Port RAM, FIFO
VHDL 20 4