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Custom hardware accelerator for image convolution operations (3x3 kernels)

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natanbc/neorv32-convolve-accelerator

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neorv32-convolve-accelerator

Accelerator for image convolution kernels, designed to run in a DE2-115. Mainly meant to run Sobel edge detection, but can be applied to any 3x3 convolution kernel, able to run two convolutions per iteration, with a few predefined ways of merging them into a result value (but both intermediate results are also available, if you want to merge them in another way in software).

Building

  1. git clone --recursive https://github.com/natanbc/neorv32-convolve-accelerator
  2. Open cpu.qpf in quartus
  3. Compile it
  4. Flash it
  5. Build the software:
cd software/projects/convolve
make NEORV32_HOME=$(pwd)/../../../neorv32 -j$(nproc)
  1. Connect to the serial port on the FPGA (19200-8-N-1), when prompted upload the .build/convolve.flash file generated by the make command above.

Testing

Run make testbench to run the VHDL testbench. You'll need yosys, ghdl and the yosys ghdl plugin. The provided shell.nix file sets up an environment with these packages.

To test the software, an emulator is provided:

cd software/projects/convolve/emulator
make

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Custom hardware accelerator for image convolution operations (3x3 kernels)

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