Yet anOther (hardware) Description Language
- Install Moonbit and firtool (tested with version 1.108.0)
$ git clone https://github.com/nathsou/yodl.git yodl$ cd yodl$ moon run src/main examples/Hello.yodl "write_firrtl Hello.fir"$ firtool --format=fir --verilog Hello.fir -o Hello.sv
- FIRRTL export
- Generic multi-port memories
- Imports (TODO: unqualified imports)
- Verilator + SDL graphics simulation example
- Multi-dimensional vectors (uint<16>[4][8])
- Optional module parameters (and register initial value)
- Arbitrary port types
- Type parameters
- Source Maps
- Test Benches
- KiCad schematics export
- Web tour/playground