Add Counter Output examples

examples/counter_out/cont_gen_dig_pulse_train.py

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+"""Example for continuously generating digital pulse train.
+
+This example demonstrates how to generate a continuous digital
+pulse train from a Counter Output Channel. The Frequency, Duty
+Cycle, and Idle State are all configurable.
+"""
+
+import nidaqmx
+from nidaqmx.constants import AcquisitionType, Level
+
+with nidaqmx.Task() as task:
+    channel = task.co_channels.add_co_pulse_chan_freq(
+        "Dev1/ctr0", idle_state=Level.LOW, initial_delay=0.0, freq=1.0, duty_cycle=0.5
+    )
+    channel.co_pulse_term = "/Dev1/PFI12"
+    task.timing.cfg_implicit_timing(sample_mode=AcquisitionType.CONTINUOUS)
+    task.start()
+
+    input("Generating pulse train. Press Enter to stop.\n")
+
+    task.stop()

examples/counter_out/cont_gen_dig_pulse_train_buff_ext_clk.py

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+"""Example for continuously generating digital pulse train with external timing.
+
+This example demonstrates how to generate a continuous buffered
+sample clocked digital pulse train from a Counter Output
+Channel. The Frequency, Duty Cycle, and Idle State are all
+configurable. The default data generated is a pulse train with a
+fixed frequency but a duty cycle that varies based on the Duty
+Cycle Max/Min and the signal type. The duty cycle will update
+with each sample clock edge.
+"""
+
+import nidaqmx
+from nidaqmx.constants import AcquisitionType, Level
+from nidaqmx.types import CtrFreq
+
+with nidaqmx.Task() as task:
+    duty_min = 0.5
+    duty_max = 0.8
+    duty_step = (duty_max - duty_min) / 1000
+    ctr_freq_data = [CtrFreq(1000, (duty_min + duty_step * i)) for i in range(1000)]
+
+    channel = task.co_channels.add_co_pulse_chan_freq(
+        "Dev1/ctr0", idle_state=Level.LOW, initial_delay=0.0, freq=1.0, duty_cycle=0.5
+    )
+    channel.co_pulse_term = "/Dev1/PFI12"
+    task.timing.cfg_samp_clk_timing(1000.0, "/Dev1/PFI0", sample_mode=AcquisitionType.CONTINUOUS)
+    task.out_stream.output_buf_size = 1000
+    task.write(ctr_freq_data)
+    task.start()
+
+    input("Generating pulse train. Press Enter to stop.\n")
+
+    task.stop()

examples/counter_out/cont_gen_dig_pulse_train_buff_implicit.py

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+"""Example for continuously generating digital pulse train with implicit timing.
+
+This example demonstrates how to generate a continuous buffered
+implicit timed digital pulse train from a Counter Output
+Channel. The Frequency, Duty Cycle, and Idle State are all
+configurable. The default data generated is a pulse train with a
+fixed frequency but a duty cycle that varies based on the Duty
+Cycle Max/Min and the signal type. The duty cycle will update
+with each sample generated.
+"""
+
+import nidaqmx
+from nidaqmx.constants import AcquisitionType, Level
+from nidaqmx.types import CtrFreq
+
+with nidaqmx.Task() as task:
+    duty_min = 0.5
+    duty_max = 0.8
+    duty_step = (duty_max - duty_min) / 1000
+    ctr_freq_data = [CtrFreq(1000, (duty_min + duty_step * i)) for i in range(1000)]
+
+    channel = task.co_channels.add_co_pulse_chan_freq(
+        "Dev1/ctr0", idle_state=Level.LOW, initial_delay=0.0, freq=1.0, duty_cycle=0.5
+    )
+    channel.co_pulse_term = "/Dev1/PFI12"
+    task.timing.cfg_implicit_timing(sample_mode=AcquisitionType.CONTINUOUS)
+    task.write(ctr_freq_data)
+    task.start()
+
+    input("Generating pulse train. Press Enter to stop.\n")
+
+    task.stop()

examples/counter_out/write_single_dig_pulse.py

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+"""Example for generating a single digital pulse.
+
+This example demonstrates how to generate a single digital pulse
+from a Counter Output Channel. The Initial Delay, High Time, Low
+Time, and Idle State are all configurable.
+"""
+
+import nidaqmx
+from nidaqmx.constants import Level
+
+with nidaqmx.Task() as task:
+    channel = task.co_channels.add_co_pulse_chan_time(
+        "Dev1/ctr0", idle_state=Level.LOW, initial_delay=0.0, low_time=0.5, high_time=1.0
+    )
+    channel.co_pulse_term = "/Dev1/PFI12"
+
+    task.start()
+    task.wait_until_done(timeout=10)
+    task.stop()