OBJECTIVE: To design schematic, layout and run simulation for an ALU to perform four operations.

1. A 4 bit carry look ahead adder
2. 4 bit 1’s complimentary
3. 4 bit 2’s complimentary
4. 4bitAddtraction

CMOS process used : mitll_fdsoi. Done in Cadence IC5141 Virtuoso schematic, Spectre sim, and LVS ver 5.1.0. prop.xx is the CDB database.