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openrisc: Define screen_info in kernel setup #5
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Commits on Jun 12, 2014
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The sparse IRQ framework is preferred nowadays so switch over to it. Signed-off-by: Jonas Bonn <jonas@southpole.se>
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Add IO primitives for Wishbone bus
The Wishbone bus is an open source hardware bus intended to let the parts of an integrated circuit communicate with each other. This bus is primarily used by the cores hosted by the OpenCores project. The Linux device I/O model assumes that devices have fixed endianess; however, as the endianess of the OpenCores cores is determined at synthesis time, these devices may exist in both little and big endian versions. Effectively, the endianess selected at synthesis time sets an implicit bus endianess to which drivers for these devices must comply. This patch adds I/O primitives of the form wb_io[read|write][8|16|32] which map to the underlying io[read|write] functions of the correct endianess. It is intended that devices connecting to a Wishbone bus use these primitives for device I/O in order that the correct endianess be automatically applied. Signed-off-by: Jonas Bonn <jonas@southpole.se>
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openrisc: add CONFIG_WISHBONE_BUS_BIG_ENDIAN
The ethoc driver wants this as it needs to know which io accessor to use. Signed-off-by: Jonas Bonn <jonas@southpole.se>
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scet: Character driver SCET device
This is a new driver for the character device SCET. This driver sets up the device with major number 100 and minor 0. An IOCTL is provided for interfacing to the device from user space applications. Who wrote this driver? Where does it come from? Attributed to Adam for now but this needs to get sorted out before pushing upstream. Signed-off-by: Jonas Bonn <jonas@southpole.se>
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scet: Rework driver init and probing
This patch cleans up the driver initialization and device probing routines. Miscellaneous code cleanups and usage of devres routines for resource allocation. Signed-off-by: Jonas Bonn <jonas@southpole.se>
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scet: Cleanups and debug output
Custodial fixes: -- take care of some build warnings -- use standard Linux routins for debug output -- reindent scet.h Signed-off-by: Jonas Bonn <jonas@southpole.se>
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ohs900: Rename ohs900.h to ohs900-hcd.h
This matches the corresponding C file.
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ohs: move platform registration out of driver
Platform data declaration moved to include/linux/ohs900.h
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The device platform data is now initiated either from the .dts configuration or through platform_device.
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ohs900: clean up probe routine
Switch over to use devres routines and clean up probe routine.
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OHS900 USB driver balance spin_lock
Balance spin_lock_irqsave()/spin_unlock_irqsave() for all code-paths in ohs900h_urb_dequeue() Signed-off-by: Anders Nystrom <anders.nystrom@southpole.se>
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Reflect the removal of the "bitmap" #define in hcd.h
Update ohs900h_hub_descriptor() and make it resemble ehci_hub_descriptor() more.
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OHS900 include definition of prefetch()
The prefetch macro is used in out_packet() function (is it really needed?). However the required include is is missing. Also removed a double include and two outcommented ones. Signed-off-by: Anders Nystrom <anders.nystrom@southpole.se>
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ohs900: Remove superfluous name cast
device_driver.name is "const char *" Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Jonas Bonn <jonas@southpole.se>
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ohs900: Use min_t() instead of explicit casts
This also fixes a compiler warning, as one cast was missing: drivers/usb/host/ohs900-hcd.c: In function ‘out_packet’: drivers/usb/host/ohs900-hcd.c:256:200: warning: comparison of distinct pointer types lacks a cast [enabled by default] Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Jonas Bonn <jonas@southpole.se>
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phy: Reset Micrel PHY at initialization
The KSZ8001L returns an incorrect ID the first time a PHY is probed. This leads to a PHY at address 0 on the MDIO bus being missed. Resetting the PHY at initialization resolves this.
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ethoc: use big endian accessors on OpenRISC Wishbone
The OpenRISC processor is big-endian and generally has a big endian Wishbone bus. Accordingly, the bus accesses need to be big endian, too. Signed-off-by: Jonas Bonn <jonas@southpole.se>
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ethoc: add version info to compatible string
Devices from opencores.org require a compatibility string containing version information. Signed-off-by: Jonas Bonn <jonas@southpole.se>
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serio/opencores_ps2: include platform_device.h
Fixes build issues with 'make ARCH=i386 allyesconfig' Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Signed-off-by: Jonas Bonn <jonas@southpole.se>
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This is a driver for the OpenCores "Simple" SPI controller.
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spi_opencores: use RFEMPTY to determine end of transaction
The spi-simple SPI core has both a FIFO for buffering data and a transfer register that's used for shifting bits in/out. The WREMPTY status bit only indicates that the write FIFO is empty, not that everything has been shifted out because the last byte may be in the transfer register. In order to determine that a transfer has completed and a byte is ready to read, it's better to test the RFEMPTY bit; this bit will clear when there's a byte ready to be read. Reported-by: Yann Vernier <yann.vernier@orsoc.se> Signed-off-by: Jonas Bonn <jonas@southpole.se>
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spi_opencores: include cpuinfo.h
spi_opencores uses cpuinfo to find out the frequency it divides to produce the spi clock speed. This probably should be moved out into the device tree since it's not really based on the CPU but a wishbone clock. Signed-off-by: Yann Vernier <yann.vernier@orsoc.se> Signed-off-by: Jonas Bonn <jonas@southpole.se>
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spi_opencores: reset SPI controller in ocspi_reset
ocspi_reset() didn't reset the SPI controller; it only enabled it. Resetting the SPI controller is simply done by disabling it first. This can matter for instance after interrupting the boot ROM during an SPI read, leaving the controller already enabled and potentially with data in its FIFOs or transfer register. Signed-off-by: Yann Vernier <yann.vernier@orsoc.se> Signed-off-by: Jonas Bonn <jonas@southpole.se>
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spi: spi_opencores is for OpenRISC arch only
...since it uses the arch-specific cpuinfo struct to determine the clock frequency. This may be reworked in the future to make this driver generic, but for now it's OpenRISC-only. Signed-off-by: Jonas Bonn <jonas@southpole.se>
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spi/spi_opencores: rename to spi-oc-simple
This is more inline with the current naming convention of the other spi drivers and better reflect the name of the core. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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spi/spi-oc-simple: update driver names in file header
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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spi/spi-oc-simple: remove __devinit, __devexit, __init and __exit
__devinit and __devexit was removed with CONFIG_HOTPLUG. __init and __exit has never been correct on probe/remove related functions. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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spi/spi-oc-simple: include module.h
This is needed by the MODULE_ macros used in this driver. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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spi/spi-oc-simple: whitespace and format cleanup
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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spi/spi-oc-simple: remove dead and commented out code
This also make the driver reject any bits_per_word not equal to 8, since the handling of bits_per_word == 16 was non functional. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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spi/spi-oc-simple: remove unused variables
Those are probably remainders from spi-orion, removing them purge a couple of compile warnings. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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spi/spi-oc-simple: use the SPI framework queue
Replaces the deprecated master->transfer function with master->transfer_one_message and let the SPI subsystem do the message queueing instead of doing it locally. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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spi/spi-oc-simple: use platform_{get, set}_drvdata()
Use the wrapper functions for getting and setting the driver data using platform_device instead of using dev_{get,set}_drvdata() with &pdev>dev, so we can directly pass a struct platform_device. see 24b5a82 spi: use platform_{get,set}_drvdata() for the upstream commit that does this SPI subsystem wide. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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spi/spi-oc-simple: use module_platform_driver to register driver
Removes boilerplate folded into the module_platform_driver macro. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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GPIO support w/ jbtrivial driver
This patch adds generic GPIO support and a simple driver for the GPIO controller from Julius Baxter, which I'm calling jbtrivial for lack of a better name!
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jbtrivial: Add missing #include <linux/module.h>
drivers/gpio/jbtrivial.c:273:15: error: expected declaration specifiers or ‘...’ before string constant drivers/gpio/jbtrivial.c:273:1: warning: data definition has no type or storage class drivers/gpio/jbtrivial.c:273:1: warning: type defaults to ‘int’ in declaration of ‘MODULE_AUTHOR’ drivers/gpio/jbtrivial.c:273:15: warning: function declaration isn’t a prototype drivers/gpio/jbtrivial.c:274:20: error: expected declaration specifiers or ‘...’ before string constant drivers/gpio/jbtrivial.c:274:1: warning: data definition has no type or storage class drivers/gpio/jbtrivial.c:274:1: warning: type defaults to ‘int’ in declaration of ‘MODULE_DESCRIPTION’ drivers/gpio/jbtrivial.c:274:20: warning: function declaration isn’t a prototype drivers/gpio/jbtrivial.c:275:16: error: expected declaration specifiers or ‘...’ before string constant drivers/gpio/jbtrivial.c:275:1: warning: data definition has no type or storage class drivers/gpio/jbtrivial.c:275:1: warning: type defaults to ‘int’ in declaration of ‘MODULE_LICENSE’ drivers/gpio/jbtrivial.c:275:16: warning: function declaration isn’t a prototype Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
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jbtrivial: fix data direction inversed logic bug
The data direction logic was inversed, the correct logic should be: 0 = input, 1 = output Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: Remove obsolete __dev* uses in non-mainline drivers
commit 54b956b ("Remove __dev* markings from init.h") removed them, causing compile failures. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
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openrisc: Add DTS and defconfig for DE0-Nano
Add a DTS and defconfig for the Terasic DE0-Nano Development and Education Board running ORPSoC. This board contains an Altera Cyclone IV FPGA with support chips and I/O. The DTS was derived from an original by Gong Tao <gongtao0607@gmail.com> with subsequent modifications by Kevin Mehall and Mark Czerski. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Kevin Mehall <contact@kevinmehall.net> Cc: Marek Czerski <ma.czerski@gmail.com> Signed-off-by: Jonas Bonn <jonas@southpole.se>
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openrisc: add cache way information to cpuinfo
Motivation for this is to be able to print the way information properly in print_cpuinfo(), instead of hardcoding it to one. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Signed-off-by: Jonas Bonn <jonas@southpole.se>
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Apply transparent_union attribute to union semun
The syscall handler for semctl is written under the assumption that the toolchain will pass "small" unions as function parameters directly instead of by reference. The union semun is "small" and thus fits this description. Since it is assumed that the union will be passed directly and not by reference, it is safe to access the union members without going via get_user. The OpenRISC architecture, however, passes all unions by reference, thus breaking the above assumption. The technically correct fix here is to mark the union as being transparent so that the ABI of the union's first element determines the parameter passing method and thus make explicit what's already implied in the function definition. Signed-off-by: Jonas Bonn <jonas@southpole.se>
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openrisc: Differentiate defconfigs by CONFIG_LOCALVERSION
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Jonas Bonn <jonas@southpole.se>
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openrisc: tlb miss handler optimizations
By slightly reorganizing the code, the number of registers used in the tlb miss handlers can be reduced by two, thus removing the need to save them to memory. Also, some dead and commented out code is removed. No functional change. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Signed-off-by: Jonas Bonn <jonas@southpole.se>
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openrisc: head: use THREAD_SIZE instead of magic constant
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: fix PTRS_PER_PGD define
On OpenRISC, with its 8k pages, PAGE_SHIFT is defined to be 13. That makes the expression (1UL << (PAGE_SHIFT-2)) evaluate to 2048. The correct value for PTRS_PER_PGD should be 256. Correcting the PTRS_PER_PGD define unveiled a bug in map_ram(), where PTRS_PER_PGD was used when the intent was to iterate over a set of page table entries. This patch corrects that issue as well. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: restore call-saved regs on sigreturn
Return to userspace via _resume_userspace instead of via syscall return path for the rt_sigreturn syscall. I'll rework this comment more later, but this patch needs testing. Old comment from previous patch: The sigreturn syscall is more like a context switch than a function call; it entails a return from one context (the signal handler) to another (the process in question). For a context switch like this there are effectively no call-saved regs that remain constant across the transition. This patch restores the call-saved regs from pt_regs before returning from the syscall, effectively restoring the context that the process had before being interrupted by the signal handler. Restoring the call-saved regs in this way allows us to return to userspace via the usual syscall fast path. Reported-by: Sebastian Macke <sebastian@macke.de> Signed-off-by: Jonas Bonn <jonas@southpole.se>
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openrisc: Add thread-local storage (TLS) support
Historically OpenRISC GCC has reserved r10 which we now use to hold the thread pointer for thread-local storage (TLS). Signed-off-by: Christian Svensson <blue@cmd.nu>
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openrisc: copy thread pointer from userregs
This is a follow up patch to Christian Svensson's TLS patch. The original patch [1] haven't been applied yet, so this should be fixed there. This patch just serves as a reminder of that... [1] http://lists.openrisc.net/pipermail/linux/2014-January/000548.html Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: irq: use irqchip framework
In addition to consolidating the or1k-pic with other interrupt controllers, this makes OpenRISC less tied to its on-cpu interrupt controller. All or1k-pic specific parts are moved out of irq.c and into drivers/irqchip/irq-or1k-pic.c In that transition, the funtionality have been divided into three chip variants. One that handles level triggered interrupts, one that handles edge triggered interrupts and one that handles the interrupt controller that is present in the or1200 OpenRISC cpu implementation. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: use "scratch sprs" to save regs on exception
Previously, the area between 0x0-0x100 have been used as a "scratch" memory area to temporarily store regs during exception entry. In a multi-core environment, this will not work. This uses the SPR_ISR hack introduced by Stefan Wallentowitz as a temporary solution until a proper "scratch spr" solution have been designed. Currently only the "critical" temp load/stores are covered, the EMERGENCY_PRINT ones are left as is (when they are used, it's game over anyway), they need to be handled as well in the future. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: add SMP and NR_CPUS Kconfig options
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: add Kconfig for l.lwa and l.swa atomic instructions
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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This utilize the load-link/store-conditional l.lwa and l.swa instructions to implement the atomic bitops. When those instructions are not available, a fallback to the generic implementation is provided. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: add cmpxchg and xchg implementations
Optimized version that use the l.lwa and l.swa instructions Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: add optimized atomic operations
Using the l.lwa and l.swa instructions Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: add spinlock implementation
Heavily based on the ARM implementation, this adds ticket spinlock support for OpenRISC. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: head: refactor out tlb flush into it's own function
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: select GENERIC_SMP_IDLE_THREAD
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: spr_defs: add SPR_COREID and SPR_NUMCORES
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: add simple_smp example dts file
Simple enough to be compatible with simulation environments, such as verilated systems etc. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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Work-in-progress, contains stubs for the IPI stuff. Apart from that secondary bringup should be "working", no guarantees though. Boot loader spinning of second cpu is not supported yet, it's assumed that Linux is booted straight after cpu reset. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: create a current_pgd for each cpu
The reason why this is created as an array, and not with DEFINE_PER_CPU is that doing it this way, we'll save a load in the tlb-miss handler (the load from __per_cpu_offset). Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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This imitates the arm64 implementation by having a smp_cross_call callback that can be set by set_smp_cross_call to initiate an IPI and a handle_IPI function that is expected to be called from an IPI irqchip driver. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc/smp: initialize current_pgd in __cpu_up
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: add smp tlb flush functionality
The SMP implementation of flush_tlb_* works by sending out a function-call IPI to all the non-local cpus by using the generic on_each_cpu() function. Currently, all flush_tlb_* functions will result in a flush_tlb_all(), which has always been the behaviour in the UP case. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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Commits on Jun 13, 2014
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openrisc/head: load r10 from per-cpu current_thread_info_set
In the SMP case, SPR_COREID is used to load the correct cpu specific current_thread_info. In the UP case, current_thread_info_set[0] is unconditionally loaded. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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irqchip: add initial support for ompic
Only IPI support is implemented so far and the whole driver should be seen as tentative at this point. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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Commits on Jun 28, 2014
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Commits on Jul 3, 2014
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openrisc: include l.swa in check for write data pagefault
the opcode for l.swa is 0x33 Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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Commits on Jul 18, 2014
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openrisc: add futex_atomic_* implementations
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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Commits on Jul 19, 2014
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Commits on Jul 22, 2014
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openrisc: remove SPR_ISR* scratch reg hack
And replace it with using a shadow regster file if such is available. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: improve description of OPENRISC_HAVE_SHADOW_GPRS
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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Commits on Jul 23, 2014
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openrisc: add Kconfig for l.lwa and l.swa atomic instructions
Not all OpenRISC cpus have support for the l.lwa and l.swa, this adds a config knob to opt them in and out. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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This utilize the load-link/store-conditional l.lwa and l.swa instructions to implement the atomic bitops. When those instructions are not available, a fallback to the generic implementation is provided. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: add cmpxchg and xchg implementations
Optimized version that make use of the l.lwa and l.swa instructions if available. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: add atomic operations implementations
Optimized version that make use of the l.lwa and l.swa instructions if available. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: include l.swa in check for write data pagefault
The way to determine if a data pagefault was caused by a write is to read the instruction at the PC that caused the fault and check if it's a store instruction. To recognize pagefaults caused by the l.swa instruction with opcode 0x33, has to be included in the check. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: add futex_atomic_* implementations
Support for the futex_atomic_* operations by using the load-link/store-conditional l.lwa/l.swa instructions. A fallback to the generic implementation is provided when those implementations aren't available. The generic implementation however only provides stubs for the functions, so to obtain proper futex support, the implementation that is added here is needed. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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Merge branch 'atomics' into smp
Conflicts: arch/openrisc/Kconfig arch/openrisc/include/asm/atomic.h
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Commits on Aug 27, 2014
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Commits on Aug 29, 2014
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Revert "net: phy: Set the driver when registering an MDIO bus device"
Commit a71e3c3 ("net: phy: Set the driver when registering an MDIO bus device") caused the following regression on the fec driver: root@imx6qsabresd:~# echo mem > /sys/power/state PM: Syncing filesystems ... done. Freezing user space processes ... (elapsed 0.003 seconds) done. Freezing remaining freezable tasks ... (elapsed 0.002 seconds) done. Unable to handle kernel NULL pointer dereference at virtual address 0000002c pgd = bcd14000 [0000002c] *pgd=4d9e0831, *pte=00000000, *ppte=00000000 Internal error: Oops: 17 [#1] SMP ARM Modules linked in: CPU: 0 PID: 617 Comm: sh Not tainted 3.16.0 torvalds#17 task: bc0c4e00 ti: bceb6000 task.ti: bceb6000 PC is at fec_suspend+0x10/0x70 LR is at dpm_run_callback.isra.7+0x34/0x6c pc : [<803f8a98>] lr : [<80361f44>] psr: 600f0013 sp : bceb7d70 ip : bceb7d88 fp : bceb7d84 r10: 8091523c r9 : 00000000 r8 : bd88f478 r7 : 803f8a88 r6 : 81165988 r5 : 00000000 r4 : 00000000 r3 : 00000000 r2 : 00000000 r1 : bd88f478 r0 : bd88f478 Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user Control: 10c5387d Table: 4cd1404a DAC: 00000015 Process sh (pid: 617, stack limit = 0xbceb6240) Stack: (0xbceb7d70 to 0xbceb8000) .... The problem with the original commit is explained by Russell King: "It has the effect (as can be seen from the oops) of attaching the MDIO bus device (itself is a bus-less device) to the platform driver, which means that if the platform driver supports power management, it will be called to power manage the MDIO bus device. Moreover, drivers do not expect to be called for power management operations for devices which they haven't probed, and certainly not for devices which aren't part of the same bus that the driver is registered against." This reverts commit a71e3c3. Cc: <stable@vger.kernel.org> #3.16 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Commits on Sep 2, 2014
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irqchip/ompic: use irqsave spinlock
ompic_raise_softirq might be called from interrupt handlers, so if interrupts are not disabled while waiting for the lock, the function might be re-entered, resulting in nested spinlocks that will cause deadlocks.
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Commits on Sep 8, 2014
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openrisc: Support both old (or32) and new (or1k) toolchain
The output file format for or1k has changed from "elf32-or32" to "elf32-or1k". Select the correct output format automatically to be able to compile the kernel with both toolchain variants. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Commits on Sep 28, 2014
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ASoC: ssm2602: add device tree bindings
Allow the ssm2602/ssm2603/ssm2604 codec driver to be instantiated from the device tree. Also, add Kconfig prompts to allow manual selection of both the I2C and SPI configuration versions of the driver. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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ASoC: ssm2602: add support for 11.025kHz and 22.5kHz sample rates
This adds the necessary values to the constraint list and register values to the coefficient table in order to configure the device for 11.025kHz and 22.5kHz sample rates. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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dma: add driver for wishbone streamer
So far only the writer part is supported. The driver only handles one channel, so on systems with several wishbone streamers, this driver has to be instantiated for each of these cores.
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Commits on Sep 30, 2014
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openrisc: Fix the bitmask for the unit present register
Signed-off-by: Sebastian Macke <sebastian@macke.de>
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openrisc: Initial support for the idle state
This patch adds basic support for the idle state of the cpu. The patch overrides the regular idle function, enables the interupts, checks for the power management unit and enables the cpu doze mode if available. Signed-off-by: Sebastian Macke <sebastian@macke.de>
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openrisc: add some missing spr registers
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: make cpuinfo per-cpu specific
This creates a per cpu cpuinfo struct and fills it out accordingly for each activated cpu. show_cpuinfo is also updated to reflect new version information in later versions of the spec. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: remove local max_low_pfn in setup_arch
Shadowing the global max_low_pfn doesn't make sense and is most likely a bug. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: time: make timers work with smp
This is a humongous hack that takes an external free running timer and synchronize the local timers to that. I only commit it since the hack is a no-op on UP, and it "works" on SMP. The proper thing to do here is to completely use an external timer with seperate capture interrupt channels. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: delay: use get_cycles() instead of reading the raw timer
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: smp: init clockevent on secondary cpus
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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openrisc: add example .dts for sockit-multicore fusesoc SoC
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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Commits on Oct 6, 2014
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Merge tag 'v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/to…
…rvalds/linux into smp Linux 3.17 Conflicts: arch/openrisc/Kconfig drivers/dma/Kconfig drivers/dma/Makefile drivers/gpio/Kconfig drivers/irqchip/Kconfig drivers/irqchip/Makefile
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Commits on Nov 3, 2014
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openrisc: add l.lwa/l.swa emulation
This adds an emulation layer for implementations that lack the l.lwa and l.swa instructions. It handles these instructions both in kernel space and user space. There's a couple todos left. The biggest one is to properly implement adjust_pc(), but to really handle the delay slots is rather painful. An alternative would be to just detect the situation and bail (it's hard to put l.lwa/l.swa in delay slots, so it's an unlikely situation). Another todo is to make all this conditional on !CONFIG_SMP, since the emulation only makes sense in UP configurations. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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Commits on Dec 20, 2014
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Linux 3.18 Conflicts: drivers/char/Kconfig sound/soc/codecs/Kconfig sound/soc/codecs/ssm2602-spi.c sound/soc/codecs/ssm2602.c
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Commits on Jan 15, 2015
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spi/spi-oc-simple: Fix cpuinfo usage
A couple of these were missed when the transition to a per-cpu cpuinfo was made.
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Commits on Feb 8, 2015
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openrisc: Add optimized memset
This adds a hand-optimized assembler version of memset and sets __HAVE_ARCH_MEMSET to use this version instead of the generic C routine Signed-off-by: Olof Kindgren <olof.kindgren@gmail.com>
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Commits on Feb 9, 2015
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openrisc: add dynamic libs to initramfs
These are a set of dynamic libs necessary to run the most basic applications.
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Commits on Feb 27, 2015
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or1k: update busybox+libs in initramfs and add missing .so files
When the dynamic libs were added, all files ending with .so were missing due to a .gitignore entry, this fixes that.
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Commits on Mar 1, 2015
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Linux 3.19 Conflicts: drivers/net/phy/micrel.c drivers/spi/Kconfig drivers/usb/host/Kconfig
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Commits on Mar 22, 2015
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openrisc: default to no-compression initramfs
bzip2, lzma, xz, lzo and lz4 have changed behaviour to default 'y', but we have historically wanted no compression at all. Change our or1ksim defconfig to behave as earlier.
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Commits on Jun 21, 2015
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Linux 4.0 Conflicts: drivers/dma/Kconfig drivers/dma/Makefile
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Commits on Oct 3, 2015
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Linux 4.2 Conflicts: arch/openrisc/kernel/setup.c drivers/dma/Kconfig drivers/dma/Makefile drivers/gpio/Makefile
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Commits on Oct 29, 2015
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