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msvc SSE2 compilation fails in i_extract(const float32<4>& a)
#188
opened Sep 3, 2024 by
peabody-korg
Assessment of the difficulty in porting CPU architecture for libsimdpp
#162
opened Sep 11, 2023 by
wangyuliu
How can we combine with Intel® SSE2 (Streaming SIMD Extensions 2)?
#156
opened Apr 25, 2021 by
ardianumam
sign(float64<N>) generates incorrect code on NEON64 using gcc 9.3.0 with -ffast-math
#153
opened Mar 3, 2021 by
peabody-korg
For a store_first(ptr, vec, 1) with SSE2, it could result into a _mm_store_ss() ?
#149
opened Jul 30, 2020 by
abique
loads and stores with vectors can read/write more than the vector size
#145
opened Jun 12, 2020 by
sarah-quinones
NEON_FLT_SP and ALTIVEC float32x4 implementation of sqrt(0) returns NaN
bug
#133
opened May 30, 2019 by
peabody-korg
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Updated in the last three days: updated:>2024-11-09.