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fixing all ci micro checks/examples
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Harishguna Satgunarajah committed Oct 2, 2023
1 parent e687a30 commit 6638912
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Showing 6 changed files with 242 additions and 74 deletions.
16 changes: 16 additions & 0 deletions examples/ethernet-nucleo-h743zi2.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -160,6 +160,7 @@ fn main() -> ! {
)
};

#[cfg(feature = "ptp")]
let ethernet::Parts {
dma: eth_dma,
mac: eth_mac,
Expand All @@ -176,6 +177,21 @@ fn main() -> ! {
&ccdr.clocks,
);

#[cfg(not(feature = "ptp"))]
let ethernet::Parts {
dma: eth_dma,
mac: eth_mac,
} = ethernet::new(
dp.ETHERNET_MAC,
dp.ETHERNET_MTL,
dp.ETHERNET_DMA,
rmii_pins,
rx_ring,
tx_ring,
mac_addr,
ccdr.peripheral.ETH1MAC,
&ccdr.clocks,
);
// let start_addend = ptp.addend();
eth_dma.enable_interrupt();

Expand Down
68 changes: 46 additions & 22 deletions examples/ethernet-rtic-stm32h735g-dk.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,12 @@ use smoltcp::iface::{Config, Interface, SocketSet, SocketStorage};
use smoltcp::time::Instant;
use smoltcp::wire::{HardwareAddress, IpAddress, IpCidr};

use stm32h7xx_hal::{ethernet, rcc::CoreClocks, stm32};
use stm32h7xx_hal::{rcc::CoreClocks, stm32};
use stm32h7xx_hal::{ethernet,
ethernet::{
RxDescriptor, RxDescriptorRing, TxDescriptor, TxDescriptorRing, MTU,
},
};

/// Configure SYSTICK for 1ms timebase
fn systick_init(mut syst: stm32::SYST, clocks: CoreClocks) {
Expand Down Expand Up @@ -73,13 +78,13 @@ static mut STORE: MaybeUninit<NetStorageStatic> = MaybeUninit::uninit();

pub struct Net<'a> {
iface: Interface,
ethdev: ethernet::EthernetDMA<4, 4>,
ethdev: ethernet::EthernetDMA<'a, 'a>,
sockets: SocketSet<'a>,
}
impl<'a> Net<'a> {
pub fn new(
store: &'a mut NetStorageStatic<'a>,
mut ethdev: ethernet::EthernetDMA<4, 4>,
mut ethdev: ethernet::EthernetDMA<'a, 'a>,
ethernet_addr: HardwareAddress,
now: Instant,
) -> Self {
Expand Down Expand Up @@ -165,6 +170,18 @@ mod app {
let rmii_txd0 = gpiob.pb12.into_alternate();
let rmii_txd1 = gpiob.pb13.into_alternate();

let rmii_pins = (
rmii_ref_clk,
rmii_mdio,
rmii_mdc,
rmii_crs_dv,
rmii_rxd0,
rmii_rxd1,
rmii_tx_en,
rmii_txd0,
rmii_txd1,
);

// Initialise ethernet...
assert_eq!(ccdr.clocks.hclk().raw(), 200_000_000); // HCLK 200MHz
assert_eq!(ccdr.clocks.pclk1().raw(), 100_000_000); // PCLK 100MHz
Expand All @@ -189,32 +206,39 @@ mod app {
)
};

#[cfg(feature = "ptp")]
let ethernet::Parts {
dma: mut eth_dma,
mac: mut eth_mac,
ptp,
dma: eth_dma,
mac: eth_mac,
ptp: _ptp,
} = ethernet::new(
dp.ETHERNET_MAC,
dp.ETHERNET_MTL,
dp.ETHERNET_DMA,
(
rmii_ref_clk,
rmii_mdio,
rmii_mdc,
rmii_crs_dv,
rmii_rxd0,
rmii_rxd1,
rmii_tx_en,
rmii_txd0,
rmii_txd1,
),
ctx.device.ETHERNET_MAC,
ctx.device.ETHERNET_MTL,
ctx.device.ETHERNET_DMA,
rmii_pins,
rx_ring,
tx_ring,
mac_addr,
ccdr.peripheral.ETH1MAC,
&ccdr.clocks,
);

#[cfg(not(feature = "ptp"))]
let ethernet::Parts {
dma: eth_dma,
mac: eth_mac,
} = ethernet::new(
ctx.device.ETHERNET_MAC,
ctx.device.ETHERNET_MTL,
ctx.device.ETHERNET_DMA,
rmii_pins,
rx_ring,
tx_ring,
mac_addr,
ccdr.peripheral.ETH1MAC,
&ccdr.clocks,
);
let start_addend = ptp.addend();
// let start_addend = ptp.addend();
eth_dma.enable_interrupt();

// Initialise ethernet PHY...
Expand Down Expand Up @@ -267,7 +291,7 @@ mod app {

#[task(binds = ETH, local = [net])]
fn ethernet_event(ctx: ethernet_event::Context) {
unsafe { ethernet::interrupt_handler() }
ethernet::eth_interrupt_handler();

let time = TIME.load(Ordering::Relaxed);
ctx.local.net.poll(time as i64);
Expand Down
114 changes: 87 additions & 27 deletions examples/ethernet-rtic-stm32h747i-disco.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,13 @@ use smoltcp::iface::{Config, Interface, SocketSet, SocketStorage};
use smoltcp::time::Instant;
use smoltcp::wire::{HardwareAddress, IpAddress, IpCidr};

use stm32h7xx_hal::{ethernet, rcc::CoreClocks, stm32};
use stm32h7xx_hal::{rcc::CoreClocks, stm32};

use stm32h7xx_hal::{ethernet,
ethernet::{
RxDescriptor, RxDescriptorRing, TxDescriptor, TxDescriptorRing, MTU,
},
};

/// Configure SYSTICK for 1ms timebase
fn systick_init(mut syst: stm32::SYST, clocks: CoreClocks) {
Expand All @@ -50,9 +56,25 @@ static TIME: AtomicU32 = AtomicU32::new(0);
/// Locally administered MAC address
const MAC_ADDRESS: [u8; 6] = [0x02, 0x00, 0x11, 0x22, 0x33, 0x44];

/// DesRing TD
const NUM_DESCRIPTORS: usize = 8;
/// Ethernet descriptor rings are a global singleton
#[link_section = ".sram3.eth"]
static mut DES_RING: ethernet::DesRing<4, 4> = ethernet::DesRing::new();
/// Doc
static mut TX_DESCRIPTORS: [TxDescriptor; NUM_DESCRIPTORS] =
[TxDescriptor::new(); NUM_DESCRIPTORS];
#[link_section = ".sram3.eth"]
/// Doc
static mut TX_BUFFERS: [[u8; MTU + 2]; NUM_DESCRIPTORS] =
[[0u8; MTU + 2]; NUM_DESCRIPTORS];
#[link_section = ".sram3.eth"]
/// Doc
static mut RX_DESCRIPTORS: [RxDescriptor; NUM_DESCRIPTORS] =
[RxDescriptor::new(); NUM_DESCRIPTORS];
#[link_section = ".sram3.eth"]
/// Doc
static mut RX_BUFFERS: [[u8; MTU + 2]; NUM_DESCRIPTORS] =
[[0u8; MTU + 2]; NUM_DESCRIPTORS];

// This data will be held by Net through a mutable reference
pub struct NetStorageStatic<'a> {
Expand All @@ -64,13 +86,13 @@ static mut STORE: MaybeUninit<NetStorageStatic> = MaybeUninit::uninit();

pub struct Net<'a> {
iface: Interface,
ethdev: ethernet::EthernetDMA<4, 4>,
ethdev: ethernet::EthernetDMA<'a, 'a>,
sockets: SocketSet<'a>,
}
impl<'a> Net<'a> {
pub fn new(
store: &'a mut NetStorageStatic<'a>,
mut ethdev: ethernet::EthernetDMA<4, 4>,
mut ethdev: ethernet::EthernetDMA<'a, 'a>,
ethernet_addr: HardwareAddress,
now: Instant,
) -> Self {
Expand Down Expand Up @@ -159,44 +181,82 @@ mod app {
let rmii_txd0 = gpiog.pg13.into_alternate();
let rmii_txd1 = gpiog.pg12.into_alternate(); // STM32H747I-DISCO

let rmii_pins = (
rmii_ref_clk,
rmii_mdio,
rmii_mdc,
rmii_crs_dv,
rmii_rxd0,
rmii_rxd1,
rmii_tx_en,
rmii_txd0,
rmii_txd1,
);
// Initialise ethernet...
assert_eq!(ccdr.clocks.hclk().raw(), 200_000_000); // HCLK 200MHz
assert_eq!(ccdr.clocks.pclk1().raw(), 100_000_000); // PCLK 100MHz
assert_eq!(ccdr.clocks.pclk2().raw(), 100_000_000); // PCLK 100MHz
assert_eq!(ccdr.clocks.pclk4().raw(), 100_000_000); // PCLK 100MHz

let mac_addr = smoltcp::wire::EthernetAddress::from_bytes(&MAC_ADDRESS);
let (eth_dma, eth_mac) = unsafe {
ethernet::new(
ctx.device.ETHERNET_MAC,
ctx.device.ETHERNET_MTL,
ctx.device.ETHERNET_DMA,
(
rmii_ref_clk,
rmii_mdio,
rmii_mdc,
rmii_crs_dv,
rmii_rxd0,
rmii_rxd1,
rmii_tx_en,
rmii_txd0,
rmii_txd1,
),
&mut DES_RING,
mac_addr,
ccdr.peripheral.ETH1MAC,
&ccdr.clocks,
let (rx_ring, tx_ring) = {
// let tx_desc = unsafe { TX_DESCRIPTORS.write([TxDescriptor::new(); NUM_DESCRIPTORS]) };
// let tx_buf = unsafe { TX_BUFFERS.write([[0u8; MTU + 2]; NUM_DESCRIPTORS]) };

// let rx_desc = unsafe { RX_DESCRIPTORS.write([RxDescriptor::new(); NUM_DESCRIPTORS]) };
// let rx_buf = unsafe { RX_BUFFERS.write([[0u8; MTU + 2]; NUM_DESCRIPTORS]) };

(
RxDescriptorRing::new(unsafe { &mut RX_DESCRIPTORS }, unsafe {
&mut RX_BUFFERS
}),
TxDescriptorRing::new(unsafe { &mut TX_DESCRIPTORS }, unsafe {
&mut TX_BUFFERS
}),
)
};

#[cfg(feature = "ptp")]
let ethernet::Parts {
dma: eth_dma,
mac: eth_mac,
ptp: _ptp,
} = ethernet::new(
ctx.device.ETHERNET_MAC,
ctx.device.ETHERNET_MTL,
ctx.device.ETHERNET_DMA,
rmii_pins,
rx_ring,
tx_ring,
mac_addr,
ccdr.peripheral.ETH1MAC,
&ccdr.clocks,
);

#[cfg(not(feature = "ptp"))]
let ethernet::Parts {
dma: eth_dma,
mac: eth_mac,
} = ethernet::new(
ctx.device.ETHERNET_MAC,
ctx.device.ETHERNET_MTL,
ctx.device.ETHERNET_DMA,
rmii_pins,
rx_ring,
tx_ring,
mac_addr,
ccdr.peripheral.ETH1MAC,
&ccdr.clocks,
);
// let start_addend = ptp.addend();
eth_dma.enable_interrupt();

// Initialise ethernet PHY...
let mut lan8742a = ethernet::phy::LAN8742A::new(eth_mac);
lan8742a.phy_reset();
lan8742a.phy_init();
// The eth_dma should not be used until the PHY reports the link is up

unsafe { ethernet::enable_interrupt() };

// unsafe: mutable reference to static storage, we only do this once
let store = unsafe {
let store_ptr = STORE.as_mut_ptr();
Expand Down Expand Up @@ -241,7 +301,7 @@ mod app {

#[task(binds = ETH, local = [net])]
fn ethernet_event(ctx: ethernet_event::Context) {
unsafe { ethernet::interrupt_handler() }
ethernet::eth_interrupt_handler();

let time = TIME.load(Ordering::Relaxed);
ctx.local.net.poll(time as i64);
Expand Down
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